Hey NXP team, @dianabatrlova @danielmartynek
I have a problem during the S32K144 controller power mode switch from VLPR to RUN mode when the microcontroller uses SPLL as clock source with external crystal oscillator
When I am using the example project given in NXP design studio it is working properly, it is done with FIRC as system clock source.
The issue is specifically with VLPR mode to RUN mode switch. RUN to HSRUN and vice versa works properly, VLPR to VLPS and vice versa works properly. RUN mode to VLPR is not an issue. But when switching from VLPR to RUN mode with clock source as external crystal oscillator mode, it is going to DEV_ASSERT.
I am attaching my project, It's name is "power_mode_switch_s32k144_ExternalClock" which is not working from external clock source and also attaching example project from NXP with internal clock, it's name is "power_mode_switch_s32k144" which is working properly.
Please help me in finding the solution to this.
Regards
Manuj Agrawal
Solved! Go to Solution.
Hi Manuj Agrawal,
This is because the SPLL CLKis not valid yet when the CLOCK_SYS_GetSysPLLFreq() function is called.
You can read the return value of SCG_GetSpllStatus(SCG) until the clock is valid, something like this:
Regards,
Daniel
Thank you so much for your help.
Thanks and Regards
Manuj Agrawal
Hi Manuj Agrawal,
I don't think there is a way to fix it without any modification to the driver.
Let me report it to the SDK team.
Regarding the FlexCAN, can you please create a new thread?
Thank you,
BR, Daniel
Hi Manuj Agrawal,
This is because the SPLL CLKis not valid yet when the CLOCK_SYS_GetSysPLLFreq() function is called.
You can read the return value of SCG_GetSpllStatus(SCG) until the clock is valid, something like this:
Regards,
Daniel