Dear All,
I would just like to query what appears to be an inconsistency in the reference manual (Rev 8 06/2018) for the S32K144.
In Section 53.1.6 on Page 1631, it says that "FlexCAN oscillator clock is SOSCDIV2_CLK as mentioned in section Table 27-9"
Whereas Table 27-9 on 9547 (and the clock config tool in AN5408), the peripheral clock is able to be switched between the SYS_CLK and the SOSCDIV2_CLK.
Can I please confirm that the text in s53.1.6 is incomplete?
Kind regards,
Damien.
Hi Damien,
I think text in chapter 53.1.6 is complete.
However used clock terms in whole FlexCAN chapter could be little bit misguiding.
The protocol engine clock (PE clock, CANCLK), that is used for CAN bit timing specification, can be connected either to Oscillator clock or to Peripheral clock, selected by CTRL1[CLKSRC] bit.
The chapter 53.1.6 describe just the Oscillator Clock source, which is SOSCDIV2_CLK in this device.
The Peripheral clock is not specified this way and it is only visible from Table 27-9 and it is SYS_CLK.
BR, Petr
