Hello,
We want to enable ECC check on SRAM for our existing project on S32K144. I did go through the Datasheet and also this example link: Example S32K14x SRAM ECC Injection - NXP Community
1. The example code uses EIM to inject fault on read and validate the ECC function and hits the respective ISR's(ERM_single_fault_IRQHandler, ERM_double_fault_IRQHandler).
2. In my understanding, any read of variable without first writing to it should cause a double fault. So I didnt configure EIM and tried reading an uninitialized local and global variable, which didn't fault out.
My code (Stripped down version of example code above) -
This doesn't seem to be working for me. Appreciate your support in understanding what could be going wrong here.
First I want to say that your understanding is correct.
According to: AN12522-S32K1xx ECC Error Handling.
2.1 SRAM initialization after power-on-reset
The reset state of the SRAM is unknown, thus data may contain random data. Most probably the first read attempt to any address would generate non-correctable ECC error. It is essential that each memory address be written to a known value before being read. If an uninitialized memory address is read, it is likely the read will result in a multiple-bit ECC error and an errored transaction on the AHB. Therefore, the SRAM must be initialized after power-up and this includes the peripherals RAM memories as the LPUART and FlexCAN RAMs.
But you forgot that the SRAM has been initialized by default when power is on. So you need to modify the startup code to turn off the power-on initialization of the SRAM.
I tested this code on Keil and the result is the same as you expected.
BR!
Jim,
Hi @Senlent
Thanks for the quick response. Maybe I forgot to mention that I had already stripped the Init RAM ECC code from startup_S32K144.s file. For some reason, the memory address is zero filled on startup even for local variables.
I'm hereby attaching the project folder for reference.
Hi @Senlent
Sorry for the late response. Though the memory address had stale data, reading from that location with ECC enabled didnt generate any fault.
Could there be something else we are missing?
I made a test again,and it works fine on my side.(s32k142 & keil )
The appendix is the routine in the IDE, and I modified it according to your method, and the test result is normal.
I'm using S32K142EVB and RTM3.0 instead of S32K144,but I think it is the same.
BR!
Jim,