Hi,
I have encountered some problem when configuring window mode of S32K144 , CMP module.
Attached is my test demo. I have used CMP_0 module, the positive input is the DAC, the negative input is the input 0,(logic analyzer channel 1 ,blue line,set freq=50kHz),the window/Sample input is the lptmr1 output(logic analyzer channel 3 ,yellow line,set freq=100Hz),the COUTA output is logic analyzer channel 0。
Reference to s32k1xx-RM 45.7.5 Windowed mode (#s 5A & 5B),I think COUTA output should output 100Hz waveform when WINDOW is high. When WINDOW is low, output should keep the last state. Please help me check whether there is any problem with the current configuration?
Thank you very much for your help!
Solved! Go to Solution.
Hi yinq,
Sorry for my previous answer, how LPTMR and LPIT define the time of WINDOW=1 is not clear yet. Please use PDB_POnDLY[DLY1][DLY2] to define the time of WINDOW=1 first.
Considering you are using S32K1 SDK RTM 3.0.3, you can use the following functions:
PDB_DRV_SetCmpPulseOutDelayForHigh
PDB_DRV_SetCmpPulseOutDelayForLow
PDB_DRV_SetCmpPulseOutEnable
Best Regards,
Robin
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Hi yinq,
Sorry for my previous answer, how LPTMR and LPIT define the time of WINDOW=1 is not clear yet. Please use PDB_POnDLY[DLY1][DLY2] to define the time of WINDOW=1 first.
Considering you are using S32K1 SDK RTM 3.0.3, you can use the following functions:
PDB_DRV_SetCmpPulseOutDelayForHigh
PDB_DRV_SetCmpPulseOutDelayForLow
PDB_DRV_SetCmpPulseOutEnable
Best Regards,
Robin
-------------------------------------------------------------------------------
Note:
- If this post answers your question, please click the "Mark Correct" button. Thank you!
- We are following threads for 7 weeks after the last post, later replies are ignored
Please open a new thread and refer to the closed one, if you have a related question at a later point in time.
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