S32K144 CAN receive problem

[唐菖蒲]

S32Hello!When I use the S32K144 chip CAN peripheral function Now I have a problem configuring CAN0 0-2 mailbox 0 mailbox receive ID: 0x7E0 1 mailbox receive ID: 0x294 Configure to receive interrupts, set breakpoints in the CAN receive interrupt function, Computer sends a frame 0 x7e0 message, program stopped at a breakpoint, click run, recurrence of 0 x7e0 message, the program can't stop at the breakpoint, then send 0 x294 message, program again stopped at a breakpoint, click run, stop at the breakpoint again, check into the reason, the last IFLAG1 = 1, said email have received 0 0 x7e0 message, the last time did not enter the interrupt. Looking for the cause, it is found that reading the ID, length, and data content will cause the interrupt to stop entering, and the comment point RxID = -- by the end of the code, the problem does not exist.But the data of the received frames cannot be obtained. Receive mask code is 0x7FF, standard frame, Structure generated by PE configuration: Const flexcan_user_config_t canCom1_InitConfig0 = { . Fd_enable = false, Pe_clock = FLEXCAN_CLK_SOURCE_SOSCDIV2, Max_num_mb = 32, Num_id_filters = FLEXCAN_RX_FIFO_ID_FILTERS_8, . Is_rx_fifo_needed = false, FlexcanMode = FLEXCAN_NORMAL_MODE, Content = FLEXCAN_PAYLOAD_SIZE_8, The bitrate = { . PropSeg = 7, . PhaseSeg1 = 4, PhaseSeg2 = 1, . PreDivider = 0, . RJumpwidth = 1 }, . Bitrate_cbt = { . PropSeg = 7, . PhaseSeg1 = 4, PhaseSeg2 = 1, . PreDivider = 0, . RJumpwidth = 1 }, Transfer_type = FLEXCAN_RXFIFO_USING_INTERRUPTS, . RxFifoDMAChannel = 0 u }; CAN initialization: { FLEXCAN_DRV_Init (INST_CANCOM1, & canCom1_State, & canCom1_InitConfig0); FLEXCAN_DRV_SetRxMaskType (INST_CANCOM1 FLEXCAN_RX_MASK_INDIVIDUAL); // set the mailbox mask type For (I = 0;I < RX0MB_LEN;I++) { Rx0MbInfo. Msg_id_type = rx0Buf [I] msg_id_type; FLEXCAN_DRV_ConfigRxMb (INST_CANCOM1, rx0Buf [I] mb_idx, & Rx0MbInfo, rx0Buf [I] msg_id); FLEXCAN_DRV_SetRxIndividualMask (INST_CANCOM1, rx0Buf [I] msg_id_type, rx0Buf [I] mb_idx, rx0Buf [I] id_mask); } // open mailbox receive interrupt For (I = 0;I < RX0MB_LEN;I++) { G_flexcanBase [INST_CANCOM1] - > IMASK1 | = ((rx0Buf [I] mb_interrupt_enable) < < rx0Buf [I] mb_idx); } }

The following is the contents of the interrupt receiving function:

{ Uint32_t mb_idx;

Uint32_t intStsFlag = FLEXCAN_HAL_GetAllMsgBuffIntStatusFlag (g_flexcanBase [INST_CANCOM1]); // determine mailbox data status

For (mb_idx = 0;Mb_idx < RX0MB_LEN;Mb_idx + +)

{ Uint32_t mask = (uint32_t) 0x01 < < mb_idx;

If (intStsFlag&mask)

{ FLEXCAN_HAL_ClearMsgBuffIntStatusFlag (g_flexcanBase [INST_CANCOM1], mask); Break; } } If (rx0Buf [mb_idx] msg_id_type = = FLEXCAN_MSG_ID_EXT) { RxID = (CAN0->RAMn[mb_idx* msg_size + 1] & can_wmbn_id_mask) >> CAN_WMBn_ID_EXT_SHIFT; } The else { RxID = (CAN0->RAMn[mb_idx* msg_size + 1] & can_wmbn_id_mask) >> CAN_WMBn_ID_STD_SHIFT; } RxLENGTH = (CAN0->RAMn[mb_idx* msg_size + 0] & CAN_WMBn_CS_DLC_MASK) >> CAN_WMBn_CS_DLC_SHIFT; For (j = 0;J < 2;J++) { RxDATA[j] = CAN0->RAMn[mb_idx*MSG_BUF_SIZE + 2 + j]; RxDATA [j] = reversebytes_uint32 (RxDATA [j]);/ / the Size end swap }

} 

[veerajuvh619]

/* ###################################################################
** Filename : main.c
** Processor : S32K1xx
** Abstract :
** Main module.
** This module contains user's application code.
** Settings :
** Contents :
** No public methods
**
** ###################################################################*/
/*!
** @file main.c
** @version 01.00
** @brief
** Main module.
** This module contains user's application code.
*/
/*!
** @addtogroup main_module main module documentation
** @{
*/
/* MODULE main */

/* Including necessary module. Cpu.h contains other modules needed for compiling.*/
#include "Cpu.h"
#include "clockMan1.h"
#include "canCom1.h"
#include "dmaController1.h"
#include "pin_mux.h"
#if CPU_INIT_CONFIG
#include "Init_Config.h"
#endif

#include <stdint.h>
#include <stdbool.h>
/* Use this define to specify if the application runs as master or slave */
#define MASTER
/* #define SLAVE */

/* Definition of the TX and RX message buffers depending on the bus role */
#if defined(MASTER)
#define TX_MAILBOX (11UL)
#define TX_MSG_ID (1UL)
#define RX_MAILBOX (10UL)
#define RX_MSG_ID (20UL)
#elif defined(SLAVE)
#define TX_MAILBOX (0UL)
#define TX_MSG_ID (2UL)
#define RX_MAILBOX (1UL)
#define RX_MSG_ID (1UL)
#endif
void SendCANData(uint32_t mailbox, uint32_t messageId, uint8_t * data, uint32_t len);

/* ID Filter table */
flexcan_id_table_t filterTable[16];
/* Define user receive buffer */
flexcan_msgbuff_t recvBuff1, recvBuff2;
volatile int exit_code = 0;
void SendCANData(uint32_t mailbox, uint32_t messageId, uint8_t * data, uint32_t len)
{
/* Set information about the data to be sent
* - 1 byte in length
* - Standard message ID
* - Bit rate switch enabled to use a different bitrate for the data segment
* - Flexible data rate enabled
* - Use zeros for FD padding
*/
flexcan_data_info_t dataInfo1 =
{
.data_length = len,
.msg_id_type = FLEXCAN_MSG_ID_STD,
.enable_brs = false,
.fd_enable = false,
.fd_padding = 0U
};

/* Configure TX message buffer with index TX_MSG_ID and TX_MAILBOX*/
FLEXCAN_DRV_ConfigTxMb(INST_CANCOM1, mailbox, &dataInfo1, messageId);

/* Execute send non-blocking */
FLEXCAN_DRV_Send(INST_CANCOM1, mailbox, &dataInfo1, messageId, data);
}

void flexcan0_Callback(uint8_t instance, flexcan_event_type_t eventType,
flexcan_state_t *flexcanState)
{
(void)flexcanState;
(void)instance;
status_t t;

switch(eventType)
{
case FLEXCAN_EVENT_RX_COMPLETE:
{
if(recvBuff1.msgId == RX_MSG_ID)
{
/* Toggle output value LED1 */
// PINS_DRV_TogglePins(LED_PORT, (1 << LED0));

/* enable receiving data in RX_MAILBOX again */
FLEXCAN_DRV_Receive(INST_CANCOM1, RX_MAILBOX, &recvBuff1);
}
}
break;
case FLEXCAN_EVENT_RXFIFO_COMPLETE:
{
/* process data from recvBuff2 */

/* Toggle output value LED0 */
// PINS_DRV_TogglePins(LED_PORT, (1 << LED1));
/* enable receiving data in RX FIFO again */
FLEXCAN_DRV_RxFifo(INST_CANCOM1,&recvBuff2);
}
break;
case FLEXCAN_EVENT_TX_COMPLETE:
{
// while(t= STATUS_SUCCESS )
// {
// t = FLEXCAN_DRV_Receive(INST_CANCOM1, RX_MAILBOX, &recvBuff1);
// }
}
break;
default:
break;
}
}
/* User includes (#include below this line is not maintained by Processor Expert) */

/*!
\brief The main function for the project.
\details The startup initialization sequence is the following:
* - startup asm routine
* - main()
*/
int main(void)
{
uint16_t id_counter;
/* Write your local variable definition here */

/*** Processor Expert internal initialization. DON'T REMOVE THIS CODE!!! ***/
#ifdef PEX_RTOS_INIT
PEX_RTOS_INIT(); /* Initialization of the selected RTOS. Macro is defined by the RTOS component. */
#endif
/*** End of Processor Expert internal initialization. ***/
CLOCK_SYS_Init(g_clockManConfigsArr, CLOCK_MANAGER_CONFIG_CNT,
g_clockManCallbacksArr, CLOCK_MANAGER_CALLBACK_CNT);
CLOCK_SYS_UpdateConfiguration(0U, CLOCK_MANAGER_POLICY_FORCIBLE);

/* Initialize pins
* - Init FlexCAN, LPSPI and GPIO pins
* - See PinSettings component for more info
*/
PINS_DRV_Init(NUM_OF_CONFIGURED_PINS, g_pin_mux_InitConfigArr);

/*Initialize FlexCAN driver */
FLEXCAN_DRV_Init(INST_CANCOM1, &canCom1_State, &canCom1_InitConfig0);
/* Install callback function */
FLEXCAN_DRV_InstallEventCallback(INST_CANCOM1, flexcan0_Callback, NULL);

/* Set information about the data to be received */
flexcan_data_info_t dataInfo =
{
.data_length = 8U,
.msg_id_type = FLEXCAN_MSG_ID_STD,
.enable_brs = false,
.fd_enable = false,
.fd_padding = 0U
};

/* Configure RX message buffer with index RX_MSG_ID and RX_MAILBOX */
// FLEXCAN_DRV_ConfigRxMb(INST_CANCOM1, RX_MAILBOX, &dataInfo, RX_MSG_ID);

// Fill id filter table,
for(id_counter=0;id_counter<8;id_counter++)
{
filterTable[id_counter].isRemoteFrame = false;
filterTable[id_counter].isExtendedFrame = false;
filterTable[id_counter].id = id_counter+1 ;
}
/* Configure RX FIFO ID filter table elements based on filter table defined above*/
FLEXCAN_DRV_ConfigRxFifo(INST_CANCOM1, FLEXCAN_RX_FIFO_ID_FORMAT_A, filterTable);
/* set individual masking type */
FLEXCAN_DRV_SetRxMaskType(INST_CANCOM1, FLEXCAN_RX_MASK_INDIVIDUAL);
/* first 10 filter items are masked with RXIMR0-RXIMR9 */
for(id_counter=0;id_counter<8;id_counter++)
FLEXCAN_DRV_SetRxIndividualMask(INST_CANCOM1, FLEXCAN_MSG_ID_STD, id_counter, 0xFFFFFFFF);
/* rest of filter items are masked with RXFGMASK */
FLEXCAN_DRV_SetRxFifoGlobalMask(INST_CANCOM1, FLEXCAN_MSG_ID_STD, 0xFFFFFFFF);

/* Start receiving data in RX_MAILBOX. */
// FLEXCAN_DRV_Receive(INST_CANCOM1, RX_MAILBOX, &recvBuff1);
/* Start receiving data in RX_RXFIFO. */
FLEXCAN_DRV_RxFifo(INST_CANCOM1,&recvBuff2);
uint8_t ledRequested[7] = {01,02,03,04,05,06,07};
SendCANData(11U, TX_MSG_ID, ledRequested, 7UL);
for(int i=0;i<1000;i++);
while(1){
FLEXCAN_DRV_RxFifo(INST_CANCOM1,&recvBuff2);
}

/* Write your code here */
/* For example: for(;;) { } */

/*** Don't write any code pass this line, or it will be deleted during code generation. ***/
/*** RTOS startup code. Macro PEX_RTOS_START is defined by the RTOS component. DON'T MODIFY THIS CODE!!! ***/
#ifdef PEX_RTOS_START
PEX_RTOS_START(); /* Startup of the selected RTOS. Macro is defined by the RTOS component. */
#endif
/*** End of RTOS startup code. ***/
/*** Processor Expert end of main routine. DON'T MODIFY THIS CODE!!! ***/
for(;;) {
if(exit_code != 0) {
break;
}
}
return exit_code;
/*** Processor Expert end of main routine. DON'T WRITE CODE BELOW!!! ***/
} /*** End of main routine. DO NOT MODIFY THIS TEXT!!! ***/

/* END main */
/*!
** @}
*/
/*
** ###################################################################
**
** This file was created by Processor Expert 10.1 [05.21]
** for the NXP S32K series of microcontrollers.
**
** ###################################################################
*/

In this code CAN transfer is successful and it hits the interrupt and calls the callback function but CAN receiving is not happening it does not go to call back function also. is there any problem with RxFIFO masking or with Message buffer setting. Please help in setting the receive data in CAN with interupt.  

[唐菖蒲]

Hi, Peter

I found the problem.

Because the message buffer is not unlocked, it cannot enter the interrupt when the same ID message is received again.

The message buffer should be unlocked after the ID, length, and data are read

Unsigned int Dummy = CAN0 - > timer;/* read timer unlocks message buffer */

Thank you very much.

[PetrS]

Hi,

if using a FlexCAN driver you should not enable interrupts outside of it. Instead use below functions

• FLEXCAN_DRV_Receive;
• FLEXCAN_DRV_ReceiveBlocking

This function in fact enable MB interrupt, so ISR is called when MB receives new data.

Within driver's ISR handler the MB interrupt is disabled finally. So to allow new ISR hit you should call above function again. This could be a reason for the behavior you see. 

BR, Petr