S32K144 ADC

[hajianik]

Hi,

I'm a bit confused about the terminology used in S32k ref manual regarding the ADC status and control registers .

It is about the ADC  SC1 register, There is SC1A, SC1B.....SC1Z ad then there is SC1A:SC1n and there is SC1[ NUMBER OF CHANNELS] .

what are the differences in all of those?

Are SC1A[0],SC1A[1]....SC1A[31]  the same as SC1[0]..SC1[1]....SC1[31] ?

Is SC1A[1] THE SAME AS SC1B or is it SC1[0] WHICH IS THE SAME AS SC1[B]?

I like to trigger on 4 different channel back2back, I tried to do this using SC1A,SC1B,SC1C,SC1D but it did not work,

I've done it using SC1A over and over but this is not efficient , I think I # could use PDB however I just can't understand all these terminology.

Please help.

Thanks,

Koorosh Hajiani

[PetrS]

Hi,

I see no SC1A[0],SC1A[1]....SC1A[31]  or SC1[0]..SC1[1]....SC1[31]  convention in the RM.

Moreover there are only 16 channels on the S32K144 and so SC1A, SC1B.....SC1P are used.

For the back2back configuration you can refer to Example S32K144 PDB ADC back-to-back test S32DS12 

BR, Petr

[xzj666]

Hi, Dear

    I'm using the pdb method to trigger the adc ,the concrete way is that, using the PDB0_CHANNEL0 pretrigger and trigger ADC0_CHANNEL0~7,after that continue to use PDB0_CHANNEL1 to pretrigger and trigger ADC0_CHANNEL8~15,(Using the SDK3.0),But ,I find that,the ADC8~ADC15 can not be pretrigger ang trigger, I want to Know what's the reason of it,the chip that i use is s32k144 with 64pins.Except that,I find the Example 'S32k144 PDB ADC back-to-back test S32k144 ' can not be gotten ,it display an invalid parameters specified,what's the reason of it? Thanks