S32K118 – DEPART Register Not Updating / Unable to Flash D Flash Region

[Kishore_14]

Hi,

I am writing to report an issue we are facing with the S32K118 microcontroller related to  DEPART register and D Flash programming.

We previously enabled the Program Partition command in our firmware with the following configuration:

FTFC->FCCOB[3] = 0x80; /* FCCOB0 = Program Partition command */
FTFC->FCCOB[6] = 0x03; /* FCCOB5 = 0x03, no data flash, 32k(all) EEPROM backup */

This set the DEPART register to 0x03, configuring the FlexNVM as full EEPROM backup with no Data Flash.

 Unable to Flash D Flash Region:

In certain cases, we need to flash the OpenBLT bootloader to the D Flash (Data Flash) region of the S32K118. However, when attempting to program this region using S32DS with the debug/flash option, we receive the following error:

Calculated CRC-16 does not match block. (File = $CEA2, Device = $0000)
Current content of flash does not match application to be programmed

We suspect this error is caused by the DEPART register being set to 0x03 (no Data Flash available), which prevents programming of the D Flash region entirely.

DEPART Register Not Changing:

We attempted to reset the DEPART register back to its default value (0x00) by running the full Program Partition command sequence again with the updated FCCOB5 value. However, the DEPART register value does not change.

However, we tested the exact same procedure on the S32K144, and the DEPART register changed successfully as expected.

Questions:

1. Is our above suspicion correct regarding the CRC error and DEPART being the root cause?
2. Is there a recommended procedure to reset the DEPART register to its default value (0x0) on an already-partitioned S32K118 device?
3. What is the correct approach to flash the D Flash region when DEPART is already set to 0x03 on S32K118?

Environment:

• Device: S32K118
• IDE: S32DS
• Bootloader: OpenBLT
• FCCOB values used: FCCOB0 = 0x80, FCCOB4 = 0x03, FCCOB5 = 0x03

Please advise on the correct approach to resolve this issue.

[Senlent]

Hi@Kishore_14

1.Is our above suspicion correct regarding the CRC error and DEPART being the root cause?

It's unclear whether this is the cause.

2.Is there a recommended procedure to reset the DEPART register to its default value (0x0) on an already-partitioned S32K118 device?

3.What is the correct approach to flash the D Flash region when DEPART is already set to 0x03 on S32K118?

The simplest operation is to use the debugger to execute the mass erase command to erase the MCU partition (note that CSEc was not enabled in the previous partitioning operation, otherwise the chip may be permanently locked after the mass erase is executed).

For PE&Micro

For J-link(j-link commander)

Enter “unlock kinetis” in the J-Link Commander.

[Kishore_14]

Hi @Senlent 

1.We need to confirm CSEc enablement status. Currently we observe:

FSEC Register = 0xFE &

FCSESTAT Register 

• BSY=0, SB=0, BIN=0, BFN=0, BOK=1, RIN=0, EDB=1, IDB=0

Based on these observed register values, is CSEc currently enabled or disabled on our S32K118? or in which register i ahve to check

2. We executed Program Partition Command (FCCOB[3]=0x80) with these parameters:

FTFC->FCCOB[3] = 0x80; /* FCCOB0 = 0x80, program partition command */

    FTFC->FCCOB[2] = 0x03; /* FCCOB1 = 2b11, 20 keys */

    FTFC->FCCOB[1] = 0x00; /* FCCOB2 = 0x00, SFE = 0, VERIFY_ONLY attribute functionality disable */

    FTFC->FCCOB[0] = 0x00; /* FCCOB3 = 0x00, FlexRAM will be loaded with valid EEPROM data during reset sequence */

    FTFC->FCCOB[7] = 0x03; /* FCCOB4 = 0x03, 2kb EEPROM Data Set Size for S32K118 */

    FTFC->FCCOB[6] = 0x03; /* FCCOB5 = 0x03, no data flash, 32k(all) EEPROM backup for S32K118 */

The command completed successfully, but we never executed any LOAD_KEY commands to program actual key values.

3. .Current situation:

• FSEC = 0xFE (KEYEN = 11)
• FCSESTAT = 0x4002002C (EDB=1, BOK=1)
• DEPART register = 0x03 (needs reset to 0x0)
• Program Partition executed but no keys loaded

With these exact register values and configuration state, can we safely perform mass erase via debugger, or do we need to use DBG_CHAL/DBG_AUTH first to avoid permanent lockout?"

Thanks.

[Senlent]

Hi@kishore_14

Your partition code indicates that you have enabled CSEc and assigned a key.

AN5401:

tip1:

Once the device is configured successfully for CSEc operation, the FCNFG register fields are set to the following. FCNFG[RAMRDY] == 0 and FCNFG[EEERDY] == 1

tip2:

With the CSEc key enabled, the chip cannot be erased in the program using the Erase All and Erase All Unsecure commands, nor can the chip's security function be disabled by using Mass Erase to erase the Flash via the debug port. This is because the CSEc module's key is stored in the D-Flash. To completely erase the chip's Flash and disable its security function using Erase All, Erase All Unsecure, and the Mass Erase command triggered by an external debugger, the key stored in the D-Flash must first be erased using the relevant CSEc commands before using the above operations to completely disable the chip's security function.

(refer to chapter 4.5 Resetting Flash to the Factory State)

In short, once CSEc is enabled and a key has been assigned, you cannot directly erase the partition using mass erase. Built-in application code is required to use the CSEc module's own instructions to restore it to its factory state.

If your application code does not handle CSEc factory restoration, the chip may not be able to restore the partition to its factory state.