S32148 PFlash has 3 Banks each of 512KB.
Read/Write is possible between different banks but not on same bank. 0x80000 is where Bank0 ends and Bank1 start, if bootloader is part of Bank0, I cannot erase content on Bank0 directly but you can on Bank1. To erase on Bank0, need to disable interrupts while the erase operation is inprogress.
Can you show where I need to add the interrupt disable if I use the SDK flash driver?
Hi@wanglijun
Disable Global interrupt before erasing or Writing operation .
INT_SYS_DisableIRQGlobal();
FLASH_DRV_EraseSector(&flashSSDConfig,addres,Erase_size);
FLASH_DRV_Program(&flashSSDConfig,addres,Write_size,FlashAry);
INT_SYS_EnableIRQGlobal();
BR!
Jim,
Hello,
If I didn't disable the interrupt, I put the erase/write function in RAM. Is it ok to solve the issue?
Hi@wanglijun
No, this makes no difference.
The reason for turning off the interrupt is to avoid RWW errors when operating Flash erase and write operations.
Refer to S32K_RM
36.5.7 Read while write (RWW)
The following simultaneous accesses are allowed for devices with FlexNVM:
• The user may read from one partition of the program flash memory while commands
(typically program and erase operations) are active in another partition of the
program flash, the data flash, and FlexRAM memory space.
• The MCU can fetch instructions from program flash during both data flash program
and erase operations and while emulated EEPROM backup is maintained by the
EEPROM commands.
• Conversely, the user may read from data flash and FlexRAM while program and
erase commands are executing on the program flash.
• When configured as traditional RAM, writes to the FlexRAM are allowed during
data flash operations.
Simultaneous data flash operations and FlexRAM writes, when FlexRAM is used for
EEE, are not possible.
Simultaneous operations are further discussed in Allowed simultaneous flash operations.
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If you want the CPU to respond to peripheral interrupts when erasing and programming Flash, you must copy its interrupt ISR to SRAM, and modify the interrupt vector table to change its vector to the SRAM address of the interrupt ISR, or save the interrupt ISR in a different Different 512B Flash Blocks such as D Flash or S32K146/8 on the Flash partition of RWW
https://mp.weixin.qq.com/s/8Zom7bnJb7ZnanVLUBubdA
https://mp.weixin.qq.com/s/MtWo5j6gzyrhAKLMH8DA5A
BR!
Jim,