Reference code to handle ECC errors in S32K144 Flash Memory (P-Flash, FlexNVM, FlexRAM)

[NJ_NXP]

Hello NXP Community,

I am implementing safety mechanisms on the S32K144 and need reference code for non-correctable (double-bit) ECC errors, alongside a method to inject them for testing.

1. Double-Bit Handling

I need code examples to catch double-bit faults across:

• P-Flash & FlexNVM:
• FlexRAM (EEE): Detecting faults during background copies.
• Exception Handlers: A BusFault or HardFault ISR routine to isolate the failing memory address.

2. Error Injection

What is the recommended way to simulate a double-bit fault in the Flash memory arrays? 

Any code snippets would be highly appreciated.

[danielmartynek]

Hi @NJ_NXP,

1.

If you are using RTD drivers, refer to the Integration Manual for the S32K1/S32M24x FLS Driver (RTD_FLS_IM.pdf), specifically Section 10.4.1 – ECC Management on Internal Flash.
The document can be found in the RTD installation directory, for example for RTD 3.0.0_QLP02:
SW32K1_S32M24x_RTD_4.4_3.0.0_QLP02\eclipse\plugins\Fls_TS_T40D2M30I0R0\doc\

Regarding FlexRAM, it does not implement ECC. However, if a double-bit error is detected during a copy-down operation, the EEPROM record is read as all 1s.
For more details, see application note AN11983 – Using the S32K1xx EEPROM Functionality:
https://www.nxp.com/docs/en/application-note/AN11983.pdf

2.

The fault can be emulated in the flash controller by setting the FERCNFG[FDFD] bit and then performing a flash read.
Alternatively, the fault can be generated by reprogramming an already programmed flash phrase and subsequently reading it.

Regards,

Daniel