Oh, not CCIF flag again

[MPC8313ERDB_h]

Hi,

Using S32K116, I was trying to program/erase the internal flash. When I step through (step by step), it works perfectly. When I let it run it is halted right after the command sequence right after clearing STAT[CCIF] flag. 

This issue was discussed several times, in the community, and the suggested solution was to run this tiny code from RAM. This should involve copying code to the SRAM_L and calling it from flash. However, the RM claims explicitly that code can be run from one section of the flash while another section is programmed/erased.

The code I'm using is as following:

u8 FlashCommandSequence(void)
{
u8 state;

FTFC->FCNFG|= 0x80; /* generate interrupt upon flash's command completion */

clr_CCIF();
do {
DG_delay(FLASH_DLY);
state= DG_read8((u32)&FTFC->FSTAT);
} while(!(state & FTFC_FSTAT_CCIF_MASK)) ;

return (u8)(FTFC->FSTAT & 0x71) ;
}

void clr_CCIF(void)
{
FTFC->FSTAT= FTFC_FSTAT_CCIF_MASK; /* clr CCIF to start programing */
__asm(" WFI");
}

From RM ( S32K1XXRM, 36.1.2): 

Having multiple read partitions allows for concurrent operations such as Read
While Write (RWW)

I have not spent to much time on copying the clr_CCIF() function to SRAM_L, but from little time I tried, it failed. 

I will appreciate any help.

David

[MPC8313ERDB_h]

Hi Diana,

Thank you so much for your answer. Having many aspects in my project I left the described problem as "an open issue" to be addressed when I'm done with other issues. As such, I have not seen your answer.
I will test your code next week. Once again thank you.

David

[dianabatrlova]

Hi David,

The description below is correct. The MCU S32K116 has only one read partition for the Flash, see the "Figure 36-2. 128KB flash memory map" in the RM rev 9. So, the possible solution for you is to launch the Flash commands from the SRAM or DFlash. 

Having multiple read partitions allows for concurrent operations such as Read
While Write (RWW)

I have prepared for you very simple test code which shows the erase and program Flash executed from RAM.

I hope it helps.

Best Regards,

Diana

[MPC8313ERDB_h]

Hi Diana,

Once again thank you.

Your example is good if I download the flash related code into the ram.
However, my application is different:

My customer wants a routine to reprogram the flash remotely (meaning update new version). My code will be embedded as a routine in the customer's application. My solution was to copy the related code into the ram (address 0x2000_2400) and run from there. I block all interrupts and WDOG ahead of jump to the ram. I have confirmed that the jump was carried correctly (I coded two assembler lines: mov lr,r0 followed by bx lr) but then I get into exception:

DefaultISR:
  b  DefaultISR 

My feeling is that the issue is associated with the RAM attributes (partitions?). In other words, it is basically an administrative problem. S32K116 doesn't have MMU, so I'm not sure how to handle it.

Could you (or any ARM's low-level programmer) please help me on this?