LPUART LIN baudrate deviation issue

[riglesias2021]

Hi, I am using LPUART1 as an instance for using s32k sdk LIN STACK with baud rate = 19200bps and Im having the following issue:

The LPUART module seems to have 2 different divisors for the input clock configured for this peripheral:

The BAUD divider (sbr), which is just a modulo divide rate, and the OSR divider (osr), which is an oversampling ratio for the baud rate generated.

I´m trying to improve the accuracy of the baud rate generated for the LIN communication, so i´m trying different clock configurations, because reference manual says that FIRC and SIRC clock have different deviation accross temperature:

Following this image, i was expecting that using FIRC clock with this peripheral, the baud rate accuracy will improve, but my results are showing the following: 

Notes:

(CalculatedBaud = lpuartSourceClock / (osr*sbr)

CANoe error = baud rate deviation reported by CANoe in percentage of 100 (%)

The best accuracy i could achieve, is 0.5% deviation respect LIN master baud rate, using SIRC and 8Mhz for the clock, but in the other configurations with the FIRC, which is suppossed to be more precise, i could only achieve 2% of desviation. 

I reviewed the osr and sbr parameters calculated by the NXP lin stack and they seem to be OK, so at this point i dont understand why the baud rate generated is not that good as the obtained with the SIRC...

Hope the explanation is clear enough and thank you for the help

[danielmartynek]

Hello @riglesias2021 ,

I haven't calculated it yet, however, the equestion that you use is not correct:

Can you double-check?

Thanks,

BR, Daniel

[riglesias2021]

Thats the same formula i used, the difference is the NXP Lin stack decrements the OSR before setting it to the LPUART registers, so the result is the same

[danielmartynek]

Hi @riglesias2021,

I just tested it with the S32K118 EVB and lpuart_echo_s32k118 (RTM 4.0.2) example.

Only changes:

• PTC3 as TX
• FIRC_DIV2 48MHz LPUART functional clock
• SBR 0x64 = 100, OSR = 0x18 = 24

And the TX signal looks correct:

Can you please scope the following:

• TX signal
• LIN signal
• FIRCDIV2 at CLKOUT

Thanks,

BR, Daniel

[riglesias2021]

Hello, thank you for the reply.

From my side it seems that the FIRC precission was corrected after enabling the "FIRC Regulator". I cant find too much information about this regulator in the s32k118 reference manual, but it seems that this feature improves the clock deviation so my issue was corrected after enabling this feature.

Thank you.

[danielmartynek]

Hello @riglesias2021,

Thanks for the updated.

This seems to be correct.

Answer from the design team:

"The FIRCREGOFF bit is used to control an internal regulator used by the FIRC internal circuit. In order to guarantee the operation frequency of the FIRC, the application must make sure to set this bit. Otherwise, FIRC operational frequency may get out of spec."

Regards,

Daniel