LPO Clock initialize WatchDog Problem

[koehlerl]

Hello,

when I initialize the LPO Clock with the Processor Expert Default configuration (120kHz, LPO enable) then I am having problems with my watchdog. The watchdog is comming. But if I don't initialize the LPO Clock via the Processor Exper the watchdog will be fine.

The LPO clock register and the PMC register have the same values in both cases.

What is the Problem when I initalize the LPO clock ?

I use the S32K144.

BR Lutz

[danielmartynek]

Hello Lutz,

Could you please elaborate?

What does "The watchdog is comming" mean?

Do you use the WDOG SDK driver and which SDK version?

Thanks,

Daniel

[koehlerl]

Hello,

I use the SDK_S32K14x_RTM_2.0.0.

“The watch dog is coming” means I get a WatchDog interrupt with system reset regardless that I Restart the WatchDog Counter in right time.

WDOG is Initialize with WDOG_DRV_Init(INST_WATCHDOG1, &watchdog1_Config0);

When I don’t initialize the LPO Clock in PE, I don’t get the a WatchDog interrupt when I restart the WDOG Counter with WDOG_DRV_Trigger(INST_WATCHDOG1) in the right time.

But when I initialize the LPO Clock in PE I get the WatchDog Interrupt regardless of reset the Watchdog Counter.

I don’t understand this behavior, because the WDOG should run in both case with the same clock, because default is LPO clock select.

BR Lutz

Von: danielmartynek

Gesendet: Mittwoch, 23. Januar 2019 12:34

An: Köhler, Lutz <lutz.koehler@acd-antriebstechnik.de>

Betreff: Re: - Re: LPO Clock initialize WatchDog Problem

NXP Community <https://community.freescale.com/resources/statics/1000/35400-NXP-Community-Email-banner-600x75.jpg>

Re: LPO Clock initialize WatchDog Problem

reply from Daniel Martynek<https://community.nxp.com/people/danielmartynek?et=watches.email.thread> in S32K - View the full discussion<https://community.nxp.com/message/1104527?commentID=1104527&et=watches.email.thread#comment-1104527>

[danielmartynek]

Hello Lutz,

I'm unable to reproduce the failure.

If possible, please share a simple test code.

The LPOCLKS register is a write-once register that gets cleared only on POR.

So, you need to make sure that you don't write twice to this register.

It doesn't make much sense though.

Is the CPU stuck somewhere unable to feed the WDOG?

You can test the LPO CLK on CLKOUT.

Regards,

Daniel

[Zhengyadong]

Hi Daniel,

If this register is forcibly set twice, what impact will it have on the MCU?

@danielmartynek 

[danielmartynek]

Hi @Zhengyadong,

The second write will not change the content of the register.

Regards,

Daniel