I have tried to configure myself, but have failed, NXP can give me some reference
you can refer to this article which is all i can find for your topic.
https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K118-FTM-PWM-DMA-S32DS-2-2/ta-p/1342183
This is no different from the demo configuration I provided to you.
I suggest you create a separate project to test this feature. You can add some flag bits for DMA transfer completion and PWM synchronization completion, and use a logic analyzer to analyze these timings.
Hi Senlent,
I want to confirm, how to confirm the completion of PWM synchronization?
I read the relevant content, and there seems to be no flag bit when the hardware triggers synchronization completion.
In addition to increasing the flag bit after the completion of DMA transfer, what other feasible measures?
I use Init_trig (CNT set 0) to trigger FTM output waveform change, FTM has waveform change, CHF set, trigger DMA so.
I used an S32K148