The S32K3 reference manual mentioned the enhanced FIFO can receive 2 different CAN message types.
But now I only want to receive one type message----extended ID message.
If I set the standard ID filter elements to 0,(i.e. NEXIF == NFE+1)
whether all standard ID messages can be blocked
Hi @luhaiou ,
NFE defines the total number of filter elements used during the enhanced RX FIFO matching process and NEXIF defines the number of extended ID filter elements used during the Enhanced RX FIFO matching process.
The relationship between NEXIF and NFE:
If you want to receive Extended ID format, you can specify this in the IDE field (Table 524.Field descriptions of reference manual), this Identifies whether the frame format is standard or extended.
1: Frame format is extended
0: Frame format is standard
In standard frame format, only the 11 most significant bits (28 to 18) are used for frame identification in both receive and transmit cases. The 18 least significant bits are ignored. In extended frame format, all bits are used for frame identification in both receive and transmit cases.
For more detailed information about Message buffer structure and Enhanced RX FIFO matching process, please refer to the latest version of the Reference Manual:
S32K3xx MCU Family - Reference Manual
Hope it helps you.
BR,
IsaulO.
Thank you very much for your reply.
For enhanced RX FIFO Filter element, there is no IDE bit to set,
Now I want to implement filtering all standard IDs.
when Enhanced RX FIFO matching process,
how to confirm the filter element is for extended ID or standard ID
For enhanced FIFO, there are 128 Filter element.
When the matching process starts, does it always start with the first filter element?
For example,
I set NFE=0, NEXIF =1.There is no standard ID filter element at this point.
Now controller receives a standard ID frame message.
At this time, there is no standard id filter element, so does the controller still have to try to match the processing.
If it try to match the processing, there is no IDE bit in the filter element,
then how can the filter element of the extended ID message match the standard ID message
I'd like to know the detailed steps in this scenario?
Thank you very much
This process is explained in detail in the 73.3.8.1 Enhanced RX FIFO matching process chapter of the Reference Manual.
Depending on the filter scheme, the matching process may vary, but the first matching criteria for any ID filter scheme is to verify the CAN Message ID type.
CAN message is extended frame format (IDE = 1).
CAN message is base frame format (IDE = 0).
If at least one filter element satisfies the matching criteria, the CAN message content is transferred to the enhanced RX FIFO memory.
Additionally, you can consult this example regarding Enhanced FIFO usage:
Example S32K344 FlexCAN_Ip TX/RX/EnhanceRXFIFO test S32DS3.4 RTD200 - NXP Community
BR,
IsaulO
Thank you very much for your reply.
I have read the reference manual,The introduction is not detailed enough,
you can judge the type of frame through the IDE BIT,
but there is no IDE BIT in the RX FIFO Filter element,
so how to determine whether this RX FIFO Filter element is an extended frame Filter or a standard frame Filter?
For example,
I set NFE=0, NEXIF =1.There is no standard ID filter element at this point.
Now controller receives a standard ID frame message.
At this time, there is no standard id filter element, so does the controller still have to try to match the processing.
If it try to match the processing, there is no IDE bit in the filter element,
then how can the filter element of the extended ID message match the standard ID message
I'd like to know the detailed steps in this scenario?
Thank you very much
Hi @luhaiou ,
The filter memory space can be split into two regions: one for extended-ID filter elements and another for standard-ID filter elements, according to ERFCR[NEXIF].
If we consider your configurations (NFE=0, NEXIF=1), the controller will search for a match with an Extended CAN Message by scanning the first region for extended-ID filter elements. The filter configurations should be specified in the first pair of ERFFEL registers.
You can check the following demo application for more information regarding Enhanced RX FIFO.
Example S32K344 FlexCAN_Ip TX/RX/EnhanceRXFIFO DMA test S32DS3.5 RTD400 - NXP Community
BR,
IsaulO.