How to Debug Multi Core with TRACE32 on S32K312?

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How to Debug Multi Core with TRACE32 on S32K312?

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NghiaLX308
Contributor I

Dear NXP Support,

I am currently using TRACE32 to debug an S32K312 device.

The S32K312 is configured with two cores (Core 0 and Core 1). I can debug Core 0 without any issues, but I am unable to debug code running on Core 1.

NghiaLX308_0-1785978107434.png

 

As shown in the attached screenshot, I set a breakpoint in the source code executed by Core 1. I also added a counter variable, and I can see that its value keeps increasing, which indicates that the code is indeed running. However, the breakpoint is never hit.

Could you please advise how to properly configure TRACE32 to debug both Core 0 and Core 1?

If there are any additional settings or initialization steps required for multi-core debugging on the S32K312, I would appreciate your guidance.

Here is my file cmm 

 

; --------------------------------------------------------------------------------
; @Title: Demo script for S32K312-M7 on S32KXXCVB-176 (FLASH)
; @Description:
; Programs the sieve demo application into the processor internal flash and
; sets up a demo debug scenario.
; This script can be used as a template for flashing an application.
; Prerequisites:
; * Connect Debug Cable to J205
; or
; Connect Combiprobe/uTrace to J10
; @Keywords: ARM, Cortex-M7, Flash
; @Author: STK
; @Board: S32KXXCVB-176
; @Chip: S32K312-M7
; @Copyright: (C) 1989-2021 Lauterbach GmbH, licensed for use with TRACE32(R) only
; --------------------------------------------------------------------------------
; $Id: s32k312_sieve_flash.cmm 17943 2021-07-12 15:34:31Z skrausse $
;WinCLEAR
; --------------------------------------------------------------------------------
; initialize and start the debugger
RESet
SYStem.RESet
SYStem.CPU S32K312-M7
;SYStem.CPU MWCT2016S-M7
SYStem.CONFIG.DEBUGPORTTYPE JTAG
IF COMBIPROBE()||UTRACE()
(
SYStem.CONFIG.CONNECTOR MIPI20T
)
SYStem.Option DUALPORT ON
SYStem.MemAccess DAP
SYStem.JtagClock 10MHz
Trace.DISable
SYStem.Up
; ECC init for the internal SRAM
DO C:\T32\demo\arm\hardware\s32k3\scripts\init_sram.cmm
; --------------------------------------------------------------------------------
; Flash programming
; prepare flash programming (declarations)
DO ~~/demo/arm/flash/s32k3.cmm PREPAREONLY
FLASH.ChangeType 0x10016000--0x1003FFFF NOP
flash.erase.all
FLASH.ReProgram ALL
(

Data.LOAD.intelhex "project.hex"
;Data.LOAD.auto *
;Data.LOAD.s1record
; Adding IVT header
;Data.Set 0x00400000++0xF0 %Long 0x0 ; Init table with 0
;Data.Set 0x00400000 %Long 0x5aa55aa5 ; Magic number
;Data.Set 0x00400004 %Long 0x00000001 ; Boot configuration word (enable M7-0)
;Data.Set 0x0040000C %Long ADDRESS.OFFSET(__nvic_base) ; M7-0 application core start adddress
;Data.Set 0x00400024 %Long 0x00000000 ; LC configuration address
)

FLASH.ReProgram OFF
; --------------------------------------------------------------------------------
SYStem.Up
Break

Data.LOAD.Elf "project.elf" /nocode

Go.direct main


SYStem.Mode Attach

TrOnchip.Set CORERESET OFF
; --------------------------------------------------------------------------------
; open some windows
Mode.Hll

Thank you for your support.

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lukaszadrapa
NXP TechSupport
NXP TechSupport

Hi @NghiaLX308 

Are we really talking about S32K312? Because this is single core device:

lukaszadrapa_0-1785996399267.png

 

Regards,

Lukas

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