HSE FW install for S32K310

[LeoYang-]

i want to install HSE FW to S32K310, based on HSE install demo downloaded from the website, can i just modify the flash configuration in the link command file according to the S32K310?

and also want to confirm, is S32K310 using the same HSE FW as S32K311?

please provide some detailed guidance about how to modify the reference demo

[lukaszadrapa]

Hi @LeoYang- 

I usually recommend to create new project directly for used derivative and then port the code. However, I believe that this project will work just with the changes you did. Used features are the same on both derivatives.

Yes, the firmware support both S32K310 and S32K311:

Regards,

Lukas

[LeoYang-]

Hi Lukas

     thank you very much for your reply!

    indeed i can read the HSE FW version after i download the project

    and the HSE_STATUS_INIT_OK flag is set every time when initialize the HW

    however when try to use the Crypto driver

   and HSE is not responding to the request, what could be the potential cause of it?

[lukaszadrapa · Accepted solution]

Hi Leo,

one more thing - it may be caused by DTCM. If data objects used for communication with HSE are located in DTCM, make sure that this switch is turned on:

It ensures that DTCM address is translated to DTCM Backdoor address by Crypto driver. That's because HSE cannot see normal DTCM address.

Regards,

Lukas

[LeoYang-]

Hi Lukas

    you are right , some variables is defined in DTCM

   we managed to move them to Sram no cacheable and it works now

   Thanks! 

[lukaszadrapa]

Hi Leo,

1. What is the frequency of HSE_CLK? If it is configured to 120MHz, try to decrease it to 60MHz.

https://community.nxp.com/t5/S32K/HSE-provides-RSP-NOT-SUPPORTED-response/m-p/1712323/highlight/true...

2. Try to disable data cache memory. All the data objects used for communication with HSE must be forced to non-cacheable memory.

3. The S32K3 reference manual says:

"Before configuring HSE_CLK, you must wait for the SBAF to enter WFI by reading core status register of HSE CPU (PRTN0_CORE2_STAT)."

So, it’s necessary to wait for WFI bit before running clock initialization.

I found out that current RTD drivers do not check WFI bit. This was a few months time ago and I can see that this should be included in the drivers in RTD version 5.0.0 and higher.

4. What is the content of HSE GPR register at 0x4039_C028? What is the content of FSR and GSR registers in MU_0?

Regards,

Lukas