GPIO digital filter

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GPIO digital filter

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eduardplanas
Contributor I

I'm trying to configure in a S32K146 the digital filter function for the input pins, but I can not see any result. Is there more information about this function than the included in the Reference Manual?

Thank you,

Eduard.

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muellermathias
Contributor III

@danielmartynek 

Is there (more) detailed information about how the filter works internally / which kind of filter is used?

E.g. the sentence "Configures the maximum size of the glitches, in clock cycles, that the digital filter absorbs for the enabled digital filters" regarding DFWR in the Reference Manual is not very illustrative (at least not to me).

What exactly are "glitches" in this case and how are they "absorbed" by the filter?

Thank you in advance!

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danielmartynek
NXP TechSupport
NXP TechSupport

Hi @muellermathias,

It is just a simple digital filter.

danielmartynek_0-1649337302855.png

Let's say there is a stable logic HIGH at the input.

If the digital filter is anabled, the Filter Length defines how long the input signal must be driven LOW before the MCU detects the falling edge.

Pulses that are shorter are absorbed.

I need to mention that the accuracy of the filter depends on the accuracy of the clock selected for the filter.

 

Regards,

Daniel

 

 

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danielmartynek
NXP TechSupport
NXP TechSupport

Hi,

Did you follow the configuration sequence in Section 12.1.3, RM r.8?

Can you share your code?

Regards,

Daniel 

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eduardplanas
Contributor I

Hi,

I followed the configuration sequence from section 11.1.3 (Digital input filter configuration sequence).

First of all I configured the pins through the function PINS_DRV_Init, then I write direct to the registers as follow:

PINS_DRV_Init(NUM_OF_CONFIGURED_PINS, g_pin_mux_InitConfigArr);

PORTB->DFCR = PORT_DFCR_CS(PORT_DIGITAL_FILTER_LPO_CLOCK);
PORTB->DFWR = PORT_DFWR_FILT(0x1F);
PORTB->DFER |= 1<<23;
PORTB->PCR[23] &= ~0x700;
PORTB->PCR[23] |= 0x100;
DelayFilter=0; while(DelayFilter<TIME_DELAY_FILTER) DelayFilter++;
PORTB->PCR[23] &= ~0x700;
PORTB->PCR[23] |= 0x100;

PORTC->DFCR = PORT_DFCR_CS(PORT_DIGITAL_FILTER_LPO_CLOCK);
PORTC->DFWR = PORT_DFWR_FILT(0x1F);
PORTC->DFER |= 1<<14;
PORTC->PCR[14] &= ~0x700;
PORTC->PCR[14] |= 0x100;
DelayFilter=0; while(DelayFilter<TIME_DELAY_FILTER) DelayFilter++;

PORTC->PCR[14] &= ~0x700;
PORTC->PCR[14] |= 0x100;

PORTC->DFCR = PORT_DFCR_CS(PORT_DIGITAL_FILTER_LPO_CLOCK);
PORTC->DFWR = PORT_DFWR_FILT(0x1F);
PORTC->DFER |= 1<<15;
PORTC->PCR[15] &= ~0x700;
PORTC->PCR[15] |= 0x100;
DelayFilter=0; while(DelayFilter<TIME_DELAY_FILTER) DelayFilter++;

PORTC->PCR[15] &= ~0x700;
PORTC->PCR[15] |= 0x100;

Regards,

Eduard.

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danielmartynek
NXP TechSupport
NXP TechSupport

Hi Eduard, 

Can you use the below code?

It does filter glitches.

void PORTD_IRQHandler(void)
{
  __asm__("BKPT");
  PORTD->ISFR = 0x10;
}

int main(void)
{
  PCC->PCCn[PCC_PORTD_INDEX]|= PCC_PCCn_CGC_MASK; /* Enable clock for PORTD */
  PORTD->PCR[4] |= PORT_PCR_MUX(1) | PORT_PCR_IRQC(9);
  /* Port D4: MUX = ALT1, GPIO
  * ISF flag and Interrupt when logic 1
  **/

  S32_NVIC->ISER[1] = (1 << (62 % 32)); // PORTD interrupt
  S32_NVIC->IP[62] = 0x00;              // PORTD Interrupt Priority level 0

  PORTD->DFWR = 0x1F;       // FILT = 31
  PORTD->DFCR = 1;          // CS = 1 Digital filters are clocked by the LPO clock.
  PORTD->DFER = 0x00000010; // PTD4

  while(1)
  {
  }
}‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍

Regards,

Daniel

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eduardplanas
Contributor I

Hi Daniel,

I will use it, thank you very much,

Eduard.

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