FreeRtos problems

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FreeRtos problems

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赵子成
Contributor IV

Hi Experts,

My project is OK without FreeRtos OS. When I add FreeRtos OS and add OSIF_MutexLock and OSIF_MutexUnlock in the file <Var_Manage.c> and <E_Buf_A.c>, I got some problems.

1、When start Scheduler, Can't enter the I2C interrupt----LPI2C_DRV_MasterIRQHandler, but Can enter the  I2C interrupt before starting Scheduler.

2、After a period of running time after Scheduler, the software will reset.

I don't know what is the root cause.

I don't know whether the FreeRtos OS configaration is OK.

I don't know the Mutex Using is OK or not.

I don't know the I2C drivers is OK or not(What attention after Using FreeRtos?)

Or anything else wrong?

Can anyone help me ? Can Experts check my project?

Thanks Very much.

I attach  my project.

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14 Replies

3,553 Views
赵子成
Contributor IV

Hi, 

Can anyone help me?

I was like a person who struggled in the Sea. 

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Alexis_A
NXP TechSupport
NXP TechSupport

Hello,

One of the most usual reasons why the OSIF_MutexLock and OSIF_MutexUnlock doesn't work is that the heap or the task stack isn't enough so I will suggest incrementing these two memory sizes:

pastedImage_1.png

pastedImage_2.png

Let me know if this helps you.

Best Regards,

Alexis Andalon

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赵子成
Contributor IV

Hi, Alexis,

IF I set the heap and stack as you pointed , the sw can run at all.

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Alexis_A
NXP TechSupport
NXP TechSupport

Hello,

I download the code and trying to run it I found many errors that could not be possible to debug it. But for your explanations, I think this could be due to the WDOG, could you check the SSRS register at the start of your code to see what is the reset source?

Best Regards,

Alexis Andalon

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赵子成
Contributor IV

Hi,

The SSRS register value is 0xC2.

I don't know why.

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Alexis_A
NXP TechSupport
NXP TechSupport

Hello,

It looks like the voltage is dropping bellow the critical point configurated, have you tried monitoring the MCU voltage?

Best Regards,

Alexis Andalon

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赵子成
Contributor IV

Hi Alexis,

Another issue is when we exec Par_SaveAllParaDataToFlash function, the software will reset, I don't know why?

Thanks.

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Alexis_A
NXP TechSupport
NXP TechSupport

Hello,

These values are only to show where to modify these parameters, depending on your application is the amount of stack and heap need it.

An usual error about the functions that save data in flash Par_SaveAllParaDataToFlash is that this need to be executed from RAM since you can read and write to the RAM at the same time, so I will suggest checking the following thread that explains how to do this.

Best Regards,

Alexis Andalon

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赵子成
Contributor IV

Hi,

Yes, It is executed from RAM.

The issue is that it is OK without FreeRTOS.

But when using FreeRTOS, when running the function Par_SaveAllParaDataToFlash, the software will reset.

Can you look through the code of Par_SaveAllParaDataToFlash and point out the mistake?

Thanks very much.

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Alexis_A
NXP TechSupport
NXP TechSupport

Hello,

Can you let me know where did you find that function? I was looking in the flash component and the flash driver and I couldn't find it.

Best Regards,
Alexis Andalon

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赵子成
Contributor IV

Hi,

The function of Par_SaveAllParaDataToFlash is in the file <Par_Manage.c>, which is in the directory of "BMS13S_APP_V2010_OS_ToNxp\Sources\Service\Par_Manage".

I am looking forward to your suggestion.

Thanks.

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Alexis_A
NXP TechSupport
NXP TechSupport

Hello,

This API/File is not in the SDK so I deduce that this is part of your application, would it be possible to share what instruction is causing the reset?

Best Regards,

Alexis Andalon

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赵子成
Contributor IV

Hi, 

The source codes are in the attachments before.

I copy to be follows:

BOOL Par_SaveAllParaDataToFlash(void)
{
BOOL bResult = TRUE;

bResult = bResult && DFA_SaveParaData(WR_DFLASH_PAR_SYS, &g_unParData);

bResult = bResult && DFA_SaveParaData(WR_DFLASH_PAR_LECU, &g_unParData);

bResult = bResult && DFA_SaveParaData(WR_DFLASH_PAR_ALARM_F_HALF, &g_unParData);

bResult = bResult && DFA_SaveParaData(WR_DFLASH_PAR_ALARM_S_HALF, &g_unParData);

return bResult;
}

where DFA_SaveParaData is define:

BOOL DFA_SaveParaData(EM_WR_DFLASH emType, UN_PAR_DATA *punData)
{
BOOL bResult;

bResult = TRUE;

switch(emType)
{
case WR_DFLASH_PAR_COEF:

bResult = bResult && DFA_WrOneSectorDflashOp(emType, (UINT8*)(punData->stParData.aunParCoefData), DFLASH_BYTE_LENGTH_COEF, EM_SECTOR_NUM0_COEF_BYTE, 0);

break;

case WR_DFLASH_PAR_SYS:

bResult = bResult && DFA_WrOneSectorDflashOp(emType, (UINT8*)(punData->stParData.aunParSysData), DFLASH_BYTE_LENGTH_PAR_SYS, EM_SECTOR_NUM1_SYS, 0);

break;

case WR_DFLASH_PAR_LECU:

bResult = bResult && DFA_WrOneSectorDflashOp(emType, (UINT8*)(punData->stParData.aunParLecuData), DFLASH_BYTE_LENGTH_PAR_LECU, EM_SECTOR_NUM2_LECU, 0);

break;

case WR_DFLASH_PAR_BYTE:

bResult = bResult && DFA_WrOneSectorDflashOp(emType, punData->stParData.au8ParByteData, DFLASH_BYTE_LENGTH_BYTE, EM_SECTOR_NUM0_COEF_BYTE, DFLASH_POS_BYTE_START_INSEC);

break;

case WR_DFLASH_PAR_ALARM_F_HALF:

bResult = bResult && DFA_WrOneSectorDflashOp(emType, (UINT8*)(punData->stParData.aunParAlarmData), DFLASH_BYTE_LENGTH_PAR_ALARM / 2, EM_SECTOR_NUM4_ALARM_F_HALF, 0);

break;

case WR_DFLASH_PAR_ALARM_S_HALF:

bResult = bResult && DFA_WrOneSectorDflashOp(emType, (UINT8*)(punData->stParData.aunParAlarmData[ALM_ID_NUM / 2]), DFLASH_BYTE_LENGTH_PAR_ALARM / 2, EM_SECTOR_NUM5_ALARM_S_HALF, 0);

break;

case WR_DFLASH_PAR_UDS:

// bResult = bResult && DFA_WrOneSectorDflashOp(emType, punData->stParData.unParUdsPara.au8ParaUds, DFLASH_BYTE_LENGTH_PAR_UDS, EM_SECTOR_NUM6_UDS, 0);

break;

default:
bResult = FALSE;
break;

}

return (bResult);

}

Where DFA_WrOneSectorDflashOp is defined:

static BOOL DFA_WrOneSectorDflashOp(EM_WR_DFLASH emType, UINT8 *pu8Data, UINT16 u16Len, EM_SECTOR_NUM emSec, UINT16 u16AddrInSec)
{
status_t emResult;
UINT32 u32FailAddr;
UINT16 u16DFlashFlag, i, u16Block;
BOOL bResult;
UINT64 u64PitLastCount = 0;
UINT16 u16DelayMs = 0;

//Feed watchdog once
FeedWdgOneTime();

if(u16Len % FTFx_PHRASE_SIZE)
{
return FALSE;
}
if(u16AddrInSec % FTFx_PHRASE_SIZE)
{
return FALSE;
}
if((u16AddrInSec + u16Len) > FEATURE_FLS_DF_BLOCK_SECTOR_SIZE)
{
return FALSE;
}

INT_SYS_DisableIRQGlobal();

u64PitLastCount = LPIT_GetUsCountBeforeRun();

bResult = TRUE;
emResult = STATUS_SUCCESS;

emResult = emResult || FLASH_DRV_EraseSector(&flashSSDConfig, ADDR_DFLASH_BACKUP_ADDR, FEATURE_FLS_DF_BLOCK_SECTOR_SIZE);

emResult = emResult || FLASH_DRV_VerifySection(&flashSSDConfig, ADDR_DFLASH_BACKUP_ADDR, FEATURE_FLS_DF_BLOCK_SECTOR_SIZE / FTFx_PHRASE_SIZE, 1u);

emResult = emResult || FLASH_DRV_Program(&flashSSDConfig, ADDR_DFLASH_BACKUP_ADDR + u16AddrInSec, u16Len, pu8Data);

if(LPIT_GetIntervalMsAfterRun(u64PitLastCount, &u16DelayMs))
{
STMR_AddTickCount(u16DelayMs);
}
else
{
SOFT_TRAP();
}

INT_SYS_EnableIRQGlobal();

//Feed watchdog once
FeedWdgOneTime();

INT_SYS_DisableIRQGlobal();

u64PitLastCount = LPIT_GetUsCountBeforeRun();

emResult = emResult || FLASH_DRV_ProgramCheck(&flashSSDConfig, ADDR_DFLASH_BACKUP_ADDR + u16AddrInSec, u16Len, pu8Data, &u32FailAddr, 1u);

bResult = bResult && DFA_CheckProgram(ADDR_DFLASH_BACKUP_ADDR + u16AddrInSec, pu8Data, u16Len);

if(emType == WR_DFLASH_PAR_COEF)
{
if((DFLASH_BYTE_LENGTH_BYTE % WR_DFLASH_BUF_SIZE) != 0)
{
u16Block = DFLASH_BYTE_LENGTH_BYTE / WR_DFLASH_BUF_SIZE + 1;
}
else
{
u16Block = DFLASH_BYTE_LENGTH_BYTE / WR_DFLASH_BUF_SIZE;
}
for(i = 0; i < u16Block; i++)
{
DFA_FlashToRam(ADDR_DFLASH_ADDR + DFLASH_POS_BYTE_START_INSEC + i * WR_DFLASH_BUF_SIZE, au8WrBuf, WR_DFLASH_BUF_SIZE);

emResult = emResult || FLASH_DRV_Program(&flashSSDConfig, ADDR_DFLASH_BACKUP_ADDR + DFLASH_POS_BYTE_START_INSEC + i * WR_DFLASH_BUF_SIZE, WR_DFLASH_BUF_SIZE, au8WrBuf);

emResult = emResult || FLASH_DRV_ProgramCheck(&flashSSDConfig, ADDR_DFLASH_BACKUP_ADDR + DFLASH_POS_BYTE_START_INSEC + i * WR_DFLASH_BUF_SIZE, WR_DFLASH_BUF_SIZE, au8WrBuf, &u32FailAddr, 1u);

bResult = bResult && DFA_CheckProgram(ADDR_DFLASH_BACKUP_ADDR + DFLASH_POS_BYTE_START_INSEC + i * WR_DFLASH_BUF_SIZE, au8WrBuf, WR_DFLASH_BUF_SIZE);
}
}
else if(emType == WR_DFLASH_PAR_BYTE)
{
if((DFLASH_BYTE_LENGTH_COEF % WR_DFLASH_BUF_SIZE) != 0)
{
u16Block = DFLASH_BYTE_LENGTH_COEF / WR_DFLASH_BUF_SIZE + 1;
}
else
{
u16Block = DFLASH_BYTE_LENGTH_COEF / WR_DFLASH_BUF_SIZE;
}
for(i = 0; i < u16Block; i++)
{
DFA_FlashToRam(ADDR_DFLASH_ADDR + DFLASH_POS_COEF_START_INSEC + i * WR_DFLASH_BUF_SIZE, au8WrBuf, WR_DFLASH_BUF_SIZE);

emResult = emResult || FLASH_DRV_Program(&flashSSDConfig, ADDR_DFLASH_BACKUP_ADDR + DFLASH_POS_COEF_START_INSEC + i * WR_DFLASH_BUF_SIZE, WR_DFLASH_BUF_SIZE, au8WrBuf);

emResult = emResult || FLASH_DRV_ProgramCheck(&flashSSDConfig, ADDR_DFLASH_BACKUP_ADDR + DFLASH_POS_COEF_START_INSEC + i * WR_DFLASH_BUF_SIZE, WR_DFLASH_BUF_SIZE, au8WrBuf, &u32FailAddr, 1u);

bResult = bResult && DFA_CheckProgram(ADDR_DFLASH_BACKUP_ADDR + DFLASH_POS_COEF_START_INSEC + i * WR_DFLASH_BUF_SIZE, au8WrBuf, WR_DFLASH_BUF_SIZE);
}
}

if(LPIT_GetIntervalMsAfterRun(u64PitLastCount, &u16DelayMs))
{
STMR_AddTickCount(u16DelayMs);
}
else
{
SOFT_TRAP();
}

INT_SYS_EnableIRQGlobal();

//Feed watchdog once
FeedWdgOneTime();

INT_SYS_DisableIRQGlobal();

if((emResult != STATUS_SUCCESS) || (bResult == FALSE))
{
INT_SYS_EnableIRQGlobal();

return FALSE;
}

u64PitLastCount = LPIT_GetUsCountBeforeRun();

//写writing begin
(void)EA_EeeReadU16Data(PAR_EEE_FLAG_DFLASH_DONE, &u16DFlashFlag);

u16DFlashFlag = (u16DFlashFlag & ~(UINT16)(EM_FLASH_STATUS_BLANK2 << (emSec * 2))) | (EM_FLASH_STATUS_WRITING << (emSec * 2));

(void)EA_EeeWriteU16Data(PAR_EEE_FLAG_DFLASH_DONE, u16DFlashFlag);

//写writing end

emResult = FLASH_DRV_EraseSector(&flashSSDConfig, ADDR_DFLASH_ADDR + emSec * FEATURE_FLS_DF_BLOCK_SECTOR_SIZE, FEATURE_FLS_DF_BLOCK_SECTOR_SIZE);

emResult = emResult || FLASH_DRV_VerifySection(&flashSSDConfig, ADDR_DFLASH_ADDR + emSec * FEATURE_FLS_DF_BLOCK_SECTOR_SIZE, FEATURE_FLS_DF_BLOCK_SECTOR_SIZE / FTFx_PHRASE_SIZE, 1u);

bResult = bResult && DFA_WrFlashFromBackup(ADDR_DFLASH_ADDR + emSec * FEATURE_FLS_DF_BLOCK_SECTOR_SIZE, FEATURE_FLS_DF_BLOCK_SECTOR_SIZE / 2, 0);

if(LPIT_GetIntervalMsAfterRun(u64PitLastCount, &u16DelayMs))
{
STMR_AddTickCount(u16DelayMs);
}
else
{
SOFT_TRAP();
}

INT_SYS_EnableIRQGlobal();

//Feed watchdog once
FeedWdgOneTime();

INT_SYS_DisableIRQGlobal();

u64PitLastCount = LPIT_GetUsCountBeforeRun();

bResult = bResult && DFA_WrFlashFromBackup(ADDR_DFLASH_ADDR + emSec * FEATURE_FLS_DF_BLOCK_SECTOR_SIZE, FEATURE_FLS_DF_BLOCK_SECTOR_SIZE / 2, FEATURE_FLS_DF_BLOCK_SECTOR_SIZE / 2);

if(LPIT_GetIntervalMsAfterRun(u64PitLastCount, &u16DelayMs))
{
STMR_AddTickCount(u16DelayMs);
}
else
{
SOFT_TRAP();
}

INT_SYS_EnableIRQGlobal();

//Feed watchdog once
FeedWdgOneTime();

INT_SYS_DisableIRQGlobal();

if((emResult != STATUS_SUCCESS) || (bResult == FALSE))
{
INT_SYS_EnableIRQGlobal();

return FALSE;
}

u64PitLastCount = LPIT_GetUsCountBeforeRun();

//写done begin
(void)EA_EeeReadU16Data(PAR_EEE_FLAG_DFLASH_DONE, &u16DFlashFlag);

u16DFlashFlag = (u16DFlashFlag & ~(UINT16)(EM_FLASH_STATUS_BLANK2 << (emSec * 2))) | (EM_FLASH_STATUS_DONE << (emSec * 2)) ;

(void)EA_EeeWriteU16Data(PAR_EEE_FLAG_DFLASH_DONE, u16DFlashFlag);
//写done end

emResult = emResult || FLASH_DRV_EraseSector(&flashSSDConfig, ADDR_DFLASH_BACKUP_ADDR, FEATURE_FLS_DF_BLOCK_SECTOR_SIZE);

emResult = emResult || FLASH_DRV_VerifySection(&flashSSDConfig, ADDR_DFLASH_BACKUP_ADDR, FEATURE_FLS_DF_BLOCK_SECTOR_SIZE / FTFx_PHRASE_SIZE, 1u);

if(emResult != STATUS_SUCCESS)
{
bResult = FALSE;
}

if(LPIT_GetIntervalMsAfterRun(u64PitLastCount, &u16DelayMs))
{
STMR_AddTickCount(u16DelayMs);
}
else
{
SOFT_TRAP();
}

INT_SYS_EnableIRQGlobal();

return (bResult);
}

I can't point out where  the software will reset.

sometimes it happened in the code "INT_SYS_EnableIRQGlobal()", sometimes in the codes of "FeedWdgOneTime()".

Thanks.

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赵子成
Contributor IV

Hi Alexis,

I don't understand why we need so much RAM?

You know the S32K144 have only 64K RAM, It seems no reason using a half to FreeRTOS.

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