Hi @MohitManvar
Could you please provide me more details about the configurations you did to get your driver working properly, as well as the specific changes you made to enable the SCLK continuous operation? This will help me analyze your issue on my end. It would also be very helpful if you could share your project to test it.
Additionally, please also consider that when emulating I2S using FlexIO as master, 2 timers are involved, one generates the bit clock (BCLK or SCLK) and control the 2 shift registers, and the other generates the frame sync (LRCLK). From your statement, it seems that you have configured the timer responsible for the bit clock, but it would be worthwhile to check whether the timer for generating the frame sync (LRCLK) has been correctly configured as well.
Regarding the DMA implementation, it can be used to control the data operations of the shifters used in the FlexIO module, for more detailed information please refer to the S32K1 Reference Manual.
I'll be waiting for your response and please let me know if you have more doubts.
- RomanVR.
Best Regards!