FlexCAN: Is it possible to have an RX FIFO larger than 6 message depth?

[kpatil]

Hello,

I am exploring if the following approach is viable with the FlexCAN module in S32K144. 

I have previously worked with ATSAMC21 controller with the the Bosch M_CAN IP module. With that, it was possible to implement a DMA based RX FIFO of upto 64 Message Depth for Classical CAN message. By doing so, I could run a periodic task to get messages from the FIFO every 10ms without the need of enabling a RX interrupt. This was because the FIFO was big enough to store all the messages for a 10ms period at 500K baud. This would enable the controller to be in a lower power state between two task wake up instances, while not missing any messages.

In the S32K144, it looks like the RX FIFO is only 6 messages deep. This essentially means I cannot go upto 10ms without hitting an interrupt. Is there any way that the FIFO size can be increased to beyond 6 message depth, maybe using DMA? I would really appreciate some inputs in this regard.

Best,

Kedar

[PetrS · Accepted solution]

Hi,

the RXFIFO depth on FlexCAN is fixed (6 messages) and it not configurable as it is on MCAN IP.

However the DMA can be used to read out messages from RXFIFO too.

BR, Petr

[kpatil]

Petr,

Thanks for your response.

I had another follow up question, I can post this question as another thread if required.

Based on Example S32K144 FlexCAN RXFIFO DMA S32DS.ARM.2018.R1, I added DMA read from RxFIFO to my project. Is there a way that the DMA can store multiple received CAN messages in memory without the intervention (without raising any interrupts) of the host controller. The application I am aiming to achieve is to allow me to periodically wake up, read messages if any and go back to sleep/low power mode while the DMA and/or FlexCAN peripherals are actively storing messages. Could you please give some suggestions regarding this?

Thanks and Regards,

Kedar

[PetrS]

Hi,

yes, there should be no problem to configure the DMA to read RXFIFO and save incoming messages to some bigger array that will be read later while no CPU intervention is used. After all this is a purpose of the DMA.

The SDK driver is written in the way it disables DMA channel each time message is read and so must be enabled again after DMA callback is called. Not sure if this driver can be used in the way you need. Probably own code must be written. The behavior is simple, if the DMA and RFEN bits are set in MCR register, IFLAG1[BUF5I] generates the DMA request and no RX FIFO interrupt is generated. The DMA channel must be configured to read whole MB0 and save content as needed. 

BR, Petr

[kpatil]

Hello Petr, 

Per your suggestion I tried to implement DMA configuration for multi message transaction but I am having some issues. I have created an example project which is based on Example S32K144 FlexCAN RXFIFO DMA S32DS.ARM.2018.R1. All my implementation is in can_task.c, specifically in the following functions, ucCanEdmaRxFifoEnable, ucCanEdmaRxFifoRead, ucEdmaEnableTransfer. I would be grateful if you could have a look at it, or point to someone/place where I can request for a code review or suggestions.

Things to note:

1. The ucCanEdmaRxFifoEnable code is derived from FLEXCAN_DRV_RxFifo (flexcan_driver.c) and the ucCanEdmaRxFifoRead code is derived from FLEXCAN_CompleteRxFifoDataDMA (flexcan_driver.c)

Following is the workflow I am using (planning to achieve):

a. Initialize Clocks, Pins, CAN, DMA. (as per the example)

b. Configure CAN for Rx Fifo and set filters. (as per the example)

c. Enable DMA based transfer, start channel. (ucEdmaEnableTransfer)

d. Periodically call ucCanEdmaRxFifoEnable to read from the buffer. 

2. I am using multi block type transfer for eDMA Receiving. I have a feeling there is something wrong with my configuration, either in the transfer config parameters or the type of transfer I am using. I am able to receive the first message in the buffer but any subsequent messages are not received unless I manually start the channel again. Also, I can see the RxFIFO new frame available interrupt is being set if a second message is sent. This suggests that the channel is being disabled after the first channel request from the FlexCAN0.

I kindly request your assistance in this regard.

Best,

Kedar Patil

[PetrS]

Hi,

I gave you possible implementation is the Case you enterred.

BR, Petr