Field oriented control : ADC sample delay

[JeremyC]

Hello,

I work on the example design MBDT AN13902. This motor algorithm works at 10kHz, so ADC and PWM are synchronous.

The AN13767 is the same SW without MBDT. And in this application note, we can see the ADC samples are processed directly during the ""FOC calculation". So, during the same 100µs time.

I added a comparator on the same ADC input to trig a GPIO when the signal is above its middle value. And see a delay of 224µs between the theoretical trigger (the physical signal) and the output GPIO signal, so more than 2 loop times. (We know a GPIO can rise and fall multiple times in the same 100µs, so its rise time is almost negligible)

This time is the minimal time achievable, because the input ADC signal is not synchronous to the ADC, the real delay varies from 224µs to 324µs. But keep in mind 224µs is the real delay.

Do you know a reason which could explain this ?

Best regards

Jérémy

[PetrS]

Hi,

from the description I am not fully sure how your measurement is done, which signals are used.
According AN13767 and its project setting, The BCTU list contains 4 items, 2 parallel conversions are done on ADC0/ADC1. This is triggered by eMIOS0 ch4 flag, at falling edge of ch4 output signal. The Bctu_FIFO1_WatermarkNotification is called after those 4 conversions are done and result stored onto FIFO1. So you can add some GPIO setting/toggling into this notification and measure this with respect of eMIOS0 ch4 output. This should be within 100us period and notification delay much less.

BR, Petr