FS26_VCORE_PGOOD

[Manimuthu]

Hi,

I don't understand the content in datasheet,

Below statement is available in section 21.3.6

"When GPIO2 is used as VCORE PGOOD, the HS switch (connected internally to VPRE) is used to close the switch. An external pulldown is mandatory to assert the pin low when the high-side switch is turned off"

As per Figure 40. GPIO2 block diagram in datasheet, no high side driver is connected to VPRE. Why VPRE is coming into picture. 

[diazmarin09]

Hello Manimuthu,

I hope all is great with you. Thank you for using the NXP communities.

As we know, a VCORE PGOOD signal is available through GPIO2 pin. When GPIO2 is configured as VCORE PGOOD, GPIO2 is connected to the High side driver, supplied by VPRE.

+ When VCORE is in the good voltage range, VCORE PGOOD is high

+ When VCORE is not in the good voltage range or is disabled, VCORE PGOOD is low

I hope this information helps.

Regards,

David