Delay in updating U32CompareValue

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Delay in updating U32CompareValue

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Kanaqw
Contributor III

Having issues with WDOG module - it doesnt reset the flag even though configured right. Timeout everytime no matter what I do. In the search of what causing it I've stumble on to U32CompareValue which should be >0, but in my case its always zero, which may be the problem but Im not sure. So timer doesnt reset itself (Using a FTM 5 channel 6 & 7 btw) and when value of time goes to 65535 it resets the board even though watchdog shouldnt reset. Can you help me with that?  board is S32k146

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Kanaqw
Contributor III

I've found a solution. Turns out its in architecture of ARM m7 I'm using. Problem in startup_cmx.sx file, in it they configured only 83 interrupt vectors instead 151 that s32k146 using. Switching argument in ASM_REPT to correct value solve the issue, watchdog is now working correctly

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danielmartynek
NXP TechSupport
NXP TechSupport

Hi,

What drivers do you use?

If you refresh the WDOG with the 32bit compare value, did you enable WDOG_CS[CMD32EN], can you read the CS register?

 

BR, Daniel

 

 

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Kanaqw
Contributor III

 

Kanaqw_0-1632984549970.png

I think I've found a reason - ftm channel CV & CNT registers always =0, idk why though

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danielmartynek
NXP TechSupport
NXP TechSupport

Hi @Kanaqw,

It could be because you haven't enabled the FTM clock.

danielmartynek_0-1632995552301.png

 

BR, Daniel

 

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Kanaqw
Contributor III

I've experimented a little with it, so if I use Lptmr then u32timeout works as it should, updating its value if wdg isnt trigger, but wdg trigger also doenst work right in that mode. If I use FTM then u32timeout goes to 0 after 1 program cycle. 

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danielmartynek
NXP TechSupport
NXP TechSupport

Hi @Kanaqw,

It is still not clear what is the issue here.

Please test the WDOG, LPTMR and FTM modules separately.

Because it looks there is an issue in your SW rather than the peripherals.

If you see an issue in a peripheral module, please elaborate on the description.

Or create a simple test project that would show the issue and share it here so that I can test it.

 

Thank you,

Regards,

Daniel

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Kanaqw
Contributor III

Spend all weekend testing, modules works fine, Wdgau32timeout now updates value as it should, GPT counter works correctly, but system still resets after certain number of cycles, event though Wdgau32timeout is far from zero. Debuging the code I've seen that WdgM writes timeout to func SetTriggerCondition in Wdg.c which goes to check evaluated time & comparing it to timer value. Timer value always bigger than evaluated, but resets still ocurr. Attaching Config files, but I dont sure that its their fault.

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danielmartynek
NXP TechSupport
NXP TechSupport

Hello @Kanaqw,

I see you use MCAL, what version do you have?

Could you please provide Mcu.epc, Gpt.epc, Wdg.epc, Resource.epc files?

Do you call the "Wdg_SetTriggerCondition(TIME_OUT)" (continuously in task or interrupt timer) to extend the refresh time.

For more information, please see this thread

https://community.nxp.com/t5/S32K/Is-there-a-guide-for-MCAL-WDG-module/m-p/1057616/highlight/true

 

BR, Daniel

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Kanaqw
Contributor III

Attaching epc and config files. I dont do much, I'm only providing Wdgm with checkpoints, that use them to refresh timeout value if condition of CP is correct. debug shows me that Wdgm do everything and writes the correct timeout.

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danielmartynek
NXP TechSupport
NXP TechSupport

Can you please update this:

danielmartynek_0-1633430144723.png

Because the period of the slow mode is 1s, so the Initial timeout should be much higher than 0.5 (here I choose 3). Please check the period where you call the Wdg_SetTriggerCondition(TIME_OUT) and also make sure that the TIME_OUT is higher than 0.5 (here I choose 3).

I would like to explain the concept of Wdg driver.
Eg, when user set up the Wdg configuration as below:
- "Wdg Timeout Period" (user will set it in the Wdg 's configuraiton) Eg: WTP = 1s
- "Wdg Window Period" (user will set it in the Wdg 's configuraiton) Eg: WWP = 0.05s
- The duration for timer refresh watchdog(GPT interrupt handler will call the Wdg_Cbk_GptNotification0, the will check the Wdg_timeout and decide to “reset WDOG and reduce the Wdg_timeout” or not ) = WWP + (WTP - WWP) / 2 = 0.05s +(1s +0.05s)/2= 0.525s
- The Wdg_timeout will be set to "Wdg Initial Timeout"(WIT) when the Wdg_init is called (user will set it in the Wdg 's configuraiton) Eg: WIT=2.5s.


With the above configuration the timer will refresh watchdog 4 times (2.5s/0.525s=4) before the watchdog reset MCU.
To make the timer continue refresh the watchdog, application will need to call "Wdg_SetTriggerCondition(TIME_OUT)" to extend the refresh time.

And as the below picture shows the TIME_OUT should be higher than 0.525s (I recommend choosing TIME_OUT is “2 * WTP”).

danielmartynek_1-1633430298465.png

 

BR, Daniel

 

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Kanaqw
Contributor III

"The duration for timer refresh watchdog(GPT interrupt handler will call the Wdg_Cbk_GptNotification0, the will check the Wdg_timeout and decide to “reset WDOG and reduce the Wdg_timeout” or not" - I checked through my code and didnt find any handler fot Wdg_Cbk_GptNotification0. Can you please explain, how should it look like and what should it do?

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danielmartynek
NXP TechSupport
NXP TechSupport

Hello @Kanaqw,

The Wdg_Cbk_GptNotification0 is always set as notification for the GPT channel (which is used for trigger WDG. Please see below picture). Then the WDG driver will start and stop the GPT channel and the timer interrupt handler(in this case, it is FTM interrupt handler) will call the Wdg_Cbk_GptNotification0

danielmartynek_1-1633516144554.png

 

Regards,

Daniel

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Kanaqw
Contributor III

Is there some example project of Cfg files? With configured wdg and Gpt with ftm channel

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danielmartynek
NXP TechSupport
NXP TechSupport

There is an example in this thread:

https://community.nxp.com/t5/S32K/S32K14X-mcal-wdg-config-issue/m-p/1045601

 

BR, Daniel

 

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Kanaqw
Contributor III

Hello, guys, could you help me with it? Wdg_Cbk_GptNotification0 isnt called anywhere, so my wdg isnt continues further than its timeout. What should I do?

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danielmartynek
NXP TechSupport
NXP TechSupport

Hello @Kanaqw,

The FTM always run fast enough, because the WDG driver will call the Gpt_StartTimer(value) to make the GPT trigger in time. The value is automatically calculated and generated in the configuration. So if the timer does not run fast enough, then I think you have a problem with the configuration.

Just once more question, do you see the same issue in the example I mentioned in this thread?

 

BR, Daniel

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Kanaqw
Contributor III

Yes. But I think thats happening because I've turned GptWakeupFunctionalityApi to OFF, which blocked Gpt_SetMode and Gpt_CbkNotification. Problem that I facing right now is that I cannot compile with GptWakeupFunctionalityApi turned on, compiler just doesnt see typedefs in header, even though I've included it. Dont know if its a includes issue or compilers

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danielmartynek
NXP TechSupport
NXP TechSupport

Hi @Kanaqw,

The GptWakeupFunctionalityApi set to OFF will not block the GPT_notification.

danielmartynek_0-1634804975821.png

Can you please share the project?

 

Regards,

Daniel

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Kanaqw
Contributor III

Okay, so in my search I've been able to identify the source - FTM timer. When it reaches the C0V value, it overflowes, and should send Wdg_Notification from GPT, but it doesnt happen, I think it is some problem with interrupt handler, because now I'm getting HardFaults even when Im trying to write bits directly. project is bellow. C and cfg files

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danielmartynek
NXP TechSupport
NXP TechSupport

Can you please share the .epc files too?

 

Thank you,

BR, Daniel

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2,975 Views
Kanaqw
Contributor III

I've found a solution. Turns out its in architecture of ARM m7 I'm using. Problem in startup_cmx.sx file, in it they configured only 83 interrupt vectors instead 151 that s32k146 using. Switching argument in ASM_REPT to correct value solve the issue, watchdog is now working correctly