Clock FIRC & PLL settings

[Dev15]

Hi Team,

I'm using RTD 3.0.0, S32K312, SDK 3.5 version and trying to configure PWM channels. The core clock is set to FIRC and could see a warning.

Dev15_0-1710865361390.png

Please help to resolve it.

Thank you

[VaneB]

Hi @Dev15 

As you select FIRC as the clock source you need to disable the PLL as mentioned in the warning. the warning would not be a problem. 

B.R.

VaneB