CMU Query of S32K312

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CMU Query of S32K312

890 次查看
raj12
Contributor III

Hello,

Currently, I am working on S32K312 SAF EVAL Package. I am using S32K312EVB-Q172, PE Micro debugger and S32DS using RTD Build version S32K3_RTD_3_0_0_P07_D2306_ASR_REL_4_7_REV_0000_20230629.

Target - Debug_FLASH.

I have query related to CMU_FC and CMU_FM.

 

I am trying to develop CMU_FC and CMU_FM in my application and trying to achieve safety level ASIL B using NXPS32K312.
Can you please provide me demo application code. I can refer the demo and do my application development.

I am looking forwarded for your response.

Thanks,

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690 次查看
CongDang
NXP Employee
NXP Employee

Hi

In RTD product, only CMU_FC is supported by MCU driver. CMU_FM is not supported.

Unfortunately, we don't have demo application code available for this feature. but I think it's not difficult to do. Please follow this feature described in RM (chapter CMU_FC).

I also have some topics in community that may be useful to you:

https://community.nxp.com/t5/S32K/How-to-configure-the-CMU-module-using-S32DS-and-EBtresos-tool/td-p...

https://community.nxp.com/t5/S32K1-KEA-Internal-Community/Question-about-S32K118-CMU-with-RTD-operat...

 

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666 次查看
raj12
Contributor III
Hello Mr. @CongDang,

Thanks for your reply... sorry for late reply from my side, I was busy with other work.

After referring the S32K3XXRM, I develop the software for CMU_FC and CMU_FM module... I have query on below mentioned points: -

In my case for testing of CMU_FC: -

I am setting the Max and Min value of RCCR register then SR register is informing via FHH and FLL register accordingly depends upon the RCCR value configuration also interrupt is triggering for CMU_FC _1 but according to NXPS32K3XXRM destructive reset should be occur for respective clock. But when I try to read the FES register of MC RGM module bit 8, 10 and 12 is not going to set for CMU_FC1, CMU_FC3 and CMU_FC4.?

My expectation is here, I am creating the scenario of clock failure, so destructive reset should be trigger by MCU once the clock failure is reported. But my case SR register is reporting also interrupt is triggering for respective CMU_FC but not able to see any destructive reset reported by MCU.

For CMU_FM testing:-

We are using FRIC = 48Mhz, FXOSC = 10Mhz and Bus clock is 30Mhz in our project, so getting RCCR value is 9 which is ideal value.
But still on ideal value of RCCR register interrupt is triggering for CMU_FM_1 also getting MET_CNT value is 0x00002C in SR register of CMU_FM_1? Why on ideal clock interrupt is generated?

I am looking forward for your reply....
Thanks




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CongDang
NXP Employee
NXP Employee

Hi,

CMU_FC:

I think your case is incorrect. Look on the Destructive reset sources table on S32K3:

CongDang_0-1715067631731.png

CMU_FC _1 is not a Source module that triggers a destructive reset.

Another point is that the status of destructive reset should be checked on DES register instead of FES register as your check.

CMU_MC:

Unfortunately I have no idea on your scenario. As I mentioned, CMU_FM is not supported by us (RTD/MCAL product). I tried read S32K3-RM, but didn't realize anything in your case.

 

 

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