Here is my configuration in EB tresos
clock is 160M
The theoretical result should be:frequency = 160M/4000 = 40k,But the actual result is around 12k
Hi @drfrefw123,
Is the core clock really 160MHz?
Can you check the configuration on the HW or measure it at CLKOUT?
48MHz / 4000 = 12KHz.
CORE_CLK = 48MHz is the default configuration that uses FIRC.
Regards,
Daniel
hi,I have used the PLL clock as the core clock, is there any other configuration?
Can you check the MC_CGM registers to be sure the CORE_CLK is correctly set?
Also, all the clocks should be configured precisely to one of the Options:
RM, rev.8 Section 24.7.2 System clocking configurations.
Thank you,
Daniel