Hello NXP Community,
Controller: S32K144
Scenario:
ADC0 and ADC1 are configured in hardware trigger mode using PDB and are running continuously as part of the application. During runtime, a 4 KB flash sector erase is performed in a reserved flash memory region, followed by programming of new data into the same sector. To avoid execution issues during flash erase, interrupts are disabled before starting the flash operation and re-enabled after the erase/program sequence is completed.
Observed Behavior:
When interrupts are re-enabled after the flash operation, the application continues to run normally. Other interrupt sources continue to execute as expected, indicating that global interrupt functionality is restored correctly. However, ADC0 and ADC1 interrupt handlers are no longer triggered after the flash erase/program operation. As a result, ADC sampling stops and the application no longer receives ADC conversion updates. The issue is observed consistently whenever a flash sector erase is performed during runtime.
Additional Observation: ADC operation can be restored by forcing a software-triggered ADC conversion, after which ADC interrupts start occurring again and normal operation resumes.
Query: Is there any known interaction between flash erase/program operations and PDB-triggered ADC conversions on S32K144? Are there any recommended steps to re-synchronize or recover the ADC/PDB trigger chain after a flash operation so that ADC conversions and interrupts resume normally?