ADC triggering options via BCTU

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ADC triggering options via BCTU

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Samuel_DCosta
Contributor III

Hi,

I have a use case to trigger the ADC via the BCTU @ 25us. Which of the following would be a better option?

  1. eMIOS to BCTU to ADC
  2. PIT to BCTU to ADC (using TRGMUX)

Which of the above would be a suitable option? I would prefer to use the eMIOS option. But if it is not possible could you explain why? If yes, what would be the formula to add the 'Default Period' in the Emios_Mcl_Ip driver?

samuelpio01_0-1708353267873.png

 

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1,116 Views
Senlent
NXP TechSupport
NXP TechSupport

Hi@Samuel_DCosta

First of all, both methods are feasible
1.PIT triggers ADC sampling routine through TRGMUX

https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K344-PIT-TRGMUX-ADC-DS3-5-RTD300/ta-p/17...

2. There is no formula, but you can refer to this routine to set the trigger time

https://www.nxp.com/design/design-center/development-boards/automotive-motor-control-solutions/s32k3...

Senlent_1-1708414591941.png

 

Senlent_0-1708414511835.png

 

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1,117 Views
Senlent
NXP TechSupport
NXP TechSupport

Hi@Samuel_DCosta

First of all, both methods are feasible
1.PIT triggers ADC sampling routine through TRGMUX

https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K344-PIT-TRGMUX-ADC-DS3-5-RTD300/ta-p/17...

2. There is no formula, but you can refer to this routine to set the trigger time

https://www.nxp.com/design/design-center/development-boards/automotive-motor-control-solutions/s32k3...

Senlent_1-1708414591941.png

 

Senlent_0-1708414511835.png

 

1,102 Views
Samuel_DCosta
Contributor III

HI @Senlent,

Thanks for your input. From the image you have pasted below the green signal eMIOS_CH0_CNT starts from 0 until a particular value and then resets to 0 (MCB_UP_COUNTER).

According to the image, the period is set to 50usec, corresponding to the 8000 ticks. If the eMIOS clock frequency is 160Mhz, that fulfils the math there. 8000/160Mhz = 50usec

Samuel_DCosta_0-1708429775875.png
From the above image, the default period range can go from 0 to 65535. By using the above math, can the eMIOS Mcl period only go from 0 to 410usec?

Is my understanding correct? 

 



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Senlent
NXP TechSupport
NXP TechSupport

Hi@Samuel_DCosta

"From the above image, the default period range can go from 0 to 65535. By using the above math, can the eMIOS Mcl period only go from 0 to 410usec?"

For a 160MHZ clock source, your calculations are correct.
But this doesn't make much sense, because the clock can be divided,So 410us is not the slowest trigger sampling time

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Samuel_DCosta
Contributor III

Hi @Senlent ,

Fair enough! That was a miss on my end. I can change the Clock divider value and get a higher period.

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