Thank you very much, it really works.
I followed you instruction, updated the arm-trusted-firmware and u-boot as the patches said.
ATF patch:0001-align-fip-to-64B.patch\files\arm-trusted-firmware\recipes-bsp - goldvip/meta-gvip - NXP S32G Ve...
u-boot patch:files\u-boot\recipes-bsp - goldvip/meta-gvip - NXP S32G Vehicle Integration Platform (GoldVIP) Yocto...
Power on the RDB2 board, booted from Nor flash mode, there is another error:
Bootloader started
Load application id 0 fragment id 0 of size 458752 from 0x101240 flash address, time: 2.406 milliseconds
Load application id 1 fragment id 0 of size 2097152 from 0x300000 flash address, time: 10.877 milliseconds
NOTICE: Reset status: Power-On Reset
NOTICE: BL2: v2.5(release):bsp32.0-2.5-dirty
NOTICE: BL2: Built : 16:14:01, Mar 18 2022
NOTICE: BL2: Booting BL31
U-Boot 2020.04-dirty (Jul 05 2022 - 13:37:07 +0800)
CPU: NXP S32G274A rev. 2.1.0
Model: NXP S32G274A-RDB2
DRAM: 3.5 GiB
MMC: FSL_SDHC: 0
Loading Environment from MMC... OK
Using external clock for PCIe0, CRNS
Configuring PCIe0 as RootComplex(x2)
Using external clock for PCIe1, CRNS
Frequency 125Mhz configured for PCIe1
Configuring PCIe1 as SGMII(x2) [XPCS0 2.5G, XPCS1 OFF]
PCIe0: Failed to get link up
Pcie0: LINK_DBG_1: 0x00000000, LINK_DBG_2: 0x00000800 (expected 0x000000d1)
DEBUG_R0: 0x00341600, DEBUG_R1: 0x08200000
PCI: Failed autoconfig bar 20
PCI: Failed autoconfig bar 24
PCIe1: Not configuring PCIe, PHY not configured
In: serial@401C8000
Out: serial@401C8000
Err: serial@401C8000
Board revision: RDB2/GLDBOX Revision D
Net: EQOS phy: rgmii @ 1
Warning: eth_eqos (eth0) using random MAC address - 3a:41:22:29:2b:87
eth0: eth_eqos PFE: emac0: sgmii emac1: none emac2: rgmii
Structure length mismatch: found 0 required 176
Warning: eth_pfeng using MAC address from ROM
, eth1: eth_pfeng
Hit any key to stop autoboot: 0
899 bytes read in 14 ms (62.5 KiB/s)
## Executing script at 80200000
1048688 bytes read in 75 ms (13.3 MiB/s)
14856200 bytes read in 659 ms (21.5 MiB/s)
43476 bytes read in 16 ms (2.6 MiB/s)
## Flattened Device Tree blob at 81600000
Booting using the fdt blob at 0x81600000
Using Device Tree in place at 0000000081600000, end 000000008160efff
DT: Enabling PFE
DT: Enabling PFE_EMAC_0
DT: pfe0 set to 00:01:be:be:ef:11
DT: Disabling PFE_EMAC_1
DT: Enabling PFE_EMAC_2
DT: pfe2 set to 00:01:be:be:ef:33
Starting kernel ...
- UART enabled -
- Boot CPU booting -
- Current EL 00000004 -
- Xen must be entered in NS EL2 mode -
- Please update the bootloader -
- Boot failed -
But when I power on the board, booted from SD card mode, the serial port has no output. Why ?
I want to port GoldVIP on our designed board, there are some changes have to be made in u-boot, So I need to know how to get the original GoldVIP ATF.
Please help me, thanks a million.