Hi Team,
I am working on enabling IPC communication between the M7 and A53 cores on the S32G3 platform and am facing an issue.
M7 Flashing Details:
1. Blob (bootloader) in 0x0 address
2. Fip.bin in 0x100000 address
3. ipc_m7_0.bin in 0x200000 address
4. ipc_m7_0.bin in 0x300000 address
5. ipc_m7_0.bin in 0x400000 address
A53 Setup BSP_38:
Flashed Fls-image-auto-s32g399ardb3.sdcard
Copied the following to the boot partition:
1. Image
2. dtb
3. ipc-shm/ipc-shm-dev.ko
4. ipcshm/sample_multi_instance/ipc-shm-sample_multi-instance.ko
Issue:
M7 firmware Flashed successfully.
On the A53 side, the initial boot sequence was not functioning correctly (stopped at BL31). To resolve the issue, we updated the U‑Boot configuration in:
./configs/s32g399ardb3_defconfig
Change1:
CONFIG_S32CC_HWCONFIG="serdes0:mode=pcie,clock=ext;pcie0:mode=rc,skip=1;serdes1:mode=disabled"
This change disables SERDES1 and configures SERDES0 in PCIe mode with an external clock source, because during the M7 → A53 boot handover, the platform was defaulting to SERDES1, causing the A53 boot failure.
Change2:
CONFIG_BOOTDELAY=0.
With the above 2 changes, M7 and A53 got booted successfully.
1st module i can be able to insert (ipc-shm-dev.ko) but, when I attempt to enable IPC by running: " ipc-shm-sample_multi-instance.ko "
I receive
the error:
"Kernal Panic Error".
Image (1).jpg
Image.jpg Could you please advise how to resolve this and proceed further?