S32G3 GMAC and PFE pin assignment

[XD]

Hello,

I am using S32DS pin tools to configure GMAC0, PFE0/1/2 interfaces. However, I am encountering numerous pin conflicts between GMAC0 and PFE1, as well as between PFE0 and PFE2. According to the "S32G-VNP-RDB3 Ethernet Enablement Guide," it seems that all four interfaces are able to be configured simultaneously, and supports multiple combinations. The dts/dtsi patch files do not provide sufficient information regarding the pin assignments when attempting to use all four interfaces together.

My questions are as follows:

1. Can all four interfaces (GMAC0, PFE0, PFE1, and PFE2) be used together? If so, are there any restrictions?
2. If it is possible to use all four interfaces simultaneously, can you provide an example of the correct pin assignment? I am struggling to find enough available pins for all of them using S32DS.

Thank you for your assistance.

XD 

[chenyin_h · Accepted solution]

Hello, @XD 

Thanks for the update.

Yes, the PFE0 and PFE2 could be used simultaneously. Because on RDB3 with the BSP, the PFE0 is working on SGMII mode by default, the pins you listed are not actually used by PFE0, but by PFE2, so that no pin conflicts existed from my understanding.

Best Regards

Chenyin

[chenyin_h]

Hello, @XD 

It is my pleasure to support.

You may reference the dts file in TF-A’s source code, under fdts/, with the name s32xxx.dts/dtsi

Hope it helps

Best Regards

Chenyin

[XD]

Hi Chenyin,

I appreciate your support, and the files you provided are very helpful. According to the S32g.dtsi file, I noticed that PFE0 and PFE2 are using almost the same pin groups. Below are the PFE0/2 TX pin groups I found:

	pfe0_pins: pfe0 {
		pfe0_grp0 {
			pinmux = <S32CC_PINMUX(78, FUNC1)>,
				 <S32CC_PINMUX(113, FUNC1)>,
				 <S32CC_PINMUX(114, FUNC1)>,
				 <S32CC_PINMUX(115, FUNC1)>,
				 <S32CC_PINMUX(144, FUNC1)>;
			output-enable;
			slew-rate = <S32CC_FAST_SLEW_166MHZ>;
		};

	pfe2_pins: pfe2 {
		pfe2_grp0 {
			pinmux = <S32CC_PINMUX(78, FUNC2)>,
				 <S32CC_PINMUX(113, FUNC2)>,
				 <S32CC_PINMUX(114, FUNC2)>,
				 <S32CC_PINMUX(115, FUNC2)>,
				 <S32CC_PINMUX(144, FUNC2)>;
			output-enable;
			slew-rate = <S32CC_FAST_SLEW_166MHZ>;
		};

Given this overlap, could you please clarify how we can use PFE0 and PFE2 simultaneously?

Thank you for your assistance.

XD

[chenyin_h]

Hello, @XD 

Thanks for the questions.

1. Yes, all four interfaces (GMAC0, PFE0, PFE1, and PFE2) could be used together; for combinations, you may reference the chapter 53 of S32G3RM for the details of serdes working modes.(Page2756-2757 of S32G3 Reference Manual, Rev 3.1)
2. With the default settings of BSP, for example, BSP41, the four interfaces could be used simultaneously, you may reference the dts files in TF-A for the details.

Best Regards

Chenyin

[XD]

Hi Chenyin,

Thank you for your quick response. Regarding item 2, are the files in the kernel source code? Could you please point me to the DTS file name or the folder name of TF-A?

Thanks,

XD