S32G3 BSP41 PFE2 RGMII to RGMII without PHY on the customized board

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S32G3 BSP41 PFE2 RGMII to RGMII without PHY on the customized board

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XD
Contributor II

Hi,

Our hardware design connects PFE2 RGMII directly to the switch RGMII without a PHY. The PFE2 is configured with rgmii-id, and we have verified the 125MHz TX clock output. I have come across discussions suggesting the use of a common external clock for both sides. Is clock drifting the only concern in this setup? If so, is it possible to configure PFE2 as a clock slave and use the clock output from the switch to synchronize TX and RX?

Thanks,

XD

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alejandro_e
NXP TechSupport
NXP TechSupport

Hello @XD,

I can not access the technical information for the Marvell Switch, however, I see it is relatively similar to the SJA1110, for which you can check the following document: AN13335.pdf, in particular please check section 2.2 RGMII interface in page 8:

 
 

Screenshot 2025-01-31 115639.png

 

Let me know if this information solved your problem.

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alejandro_e
NXP TechSupport
NXP TechSupport

Hello @XD,

It is good to support you again. About your question, please refer the the S32G3 - Hardware Design Guidelines, in particular please check sections: 10 Communication Peripherals10.1.1 RGMII signal routing requirements and 13.3 High-speed routing recommendations.

There you should be able to find all the relevant information about RGMII on a HW level.

 

Let me know if you have more questions about this topic.

 

   

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2,468 Views
XD
Contributor II

Hi @alejandro_e ,

It's great that you're helping me again—I really appreciate it.

The guideline you provided is for an RGMII-to-PHY scenario. Do you have any guidelines for a direct RGMII-to-RGMII connection without a PHY?

Thanks,

XD

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2,458 Views
alejandro_e
NXP TechSupport
NXP TechSupport

Hello @XD,

To the best of my knowledge the same guidelines should apply to any device connected using RGMII, either a PHY or a switch. 

with that said, can you share the RGMII device you are connecting the S32G3 to? So I can check if there could be special considerations.

 

Thanks in advance.

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2,441 Views
XD
Contributor II

Hi @alejandro_e ,

We have a Marvell switch port running in RGMII mode, connected to PFE2 on our hardware.

Thanks,

XD

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2,395 Views
alejandro_e
NXP TechSupport
NXP TechSupport

Hello @XD,

I can not access the technical information for the Marvell Switch, however, I see it is relatively similar to the SJA1110, for which you can check the following document: AN13335.pdf, in particular please check section 2.2 RGMII interface in page 8:

 
 

Screenshot 2025-01-31 115639.png

 

Let me know if this information solved your problem.

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2,389 Views
XD
Contributor II

Hi @alejandro_e ,

Thank you again for your help. This information is very helpful.

Thanks,

XD

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2,225 Views
alejandro_e
NXP TechSupport
NXP TechSupport

Hello @XD,

I am glad you found the information helpful. Thanks for accepting my answer as a solution.

 

Best regards,

Alejandro 

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