S32G274 lockstep configuration

[marvin_wang]

Dear NXP experts

We are trying to set the S32G274 into lockstep mode. Is that possible to config the DCD command by setting the A53_GPR06 register at HSE M7 core to enable the A53 lockstep? or we must using bootloader in the M7_0 to configuration the register and initiate the A53 from there. 

appreciated your help!

[chenyin_h]

Hello, @marvin_wang

Thanks for the reply.

Yes, the default TFA image built could not meet your request since default DCD used, you can use the TFA building(based on makefile) or IVT tool(But I usually only use it for generating images for M cores) to generate specific TFA image according to the request, you may reference the code under TFA for the process of modifying the default DCD, sorry that seems there is no direct document related with it for a simple reference.

In general, I suggest using the second way of setting the A53 lockstep, since the method is more popular and already well documented in the BSP user manual.

Best Regards

Chenyin

[chenyin_h]

Hello, @marvin_wang

Thanks for the questions.

From the description in BSP user manual and the S32GRM,  in order to set the A53 into the lockstep mode, setting the A53_GPR06[CA53_LOCKSTEP_EN] register bit while the Cortex-A53 is still in reset state.

As a result, any method that could set such register while the A53 is in reset state could be meaningful, in BSP user manual, there are detailed description on it, which match your second proposal. From my thought, both methods you mentioned could be correct theoretically.

Best Regards

Chenyin

[marvin_wang]

Hi chenyin

Thanks for your reply, I have compiled the ATF (include BL2 BL31 and Uboot) and the image generated contains IVT and DCD (fip.s32), however, I am not sure where can I set the DCD command, should I manually add IVT and DCD using IVT tool?