S32G274 A53 kernel panic after m7 write LLCE

wangzhenkai · ‎03-29-2023

my board is S32G274ARDB2.

Test the method in AN13423.pdf to build the elf file for LLCE. The version I used is as follows:

S32DS.3.4_LLCE_Addon_updatesite_1.0.4_signed.zip

SW32G_RTD_4.4_3.0.2_HF01_DS_updatesite_D2204.zip

SW32G_S32DS_3.4.3_D2112.zip

generated Can_Llce_DS_Can2Can_S32G274A_M7.elf size more 2M;

generated Can_Llce_DS_Can2Can_S32G274A_M7.bin by objcopy.exe , size more 5M ;

bsp version is binaries_auto_linux_bsp33.0_s32g2_pfe ,

when enter u-boot;

my command as follow:

dcache off
mw.q 0x34000000 0x0 0x550000
fatload mmc 0:1 0x80000000 Can_Llce_DS_Can2Can_S32G274A_M7.bin

cp.q 0x80000000 0x34000000 0x550000

startm7 0x34001000 ( my question 1: how can I make sure the m7 start address is correct ???)

then boot ;

A53 kernerl panic ;

question2:Is my production process correct?

question3:How do I test the LLCE function on M7?

Daniel-Aguirre · ‎03-29-2023

Hi,

Seems to be a problem with the M7 image itself being loaded with u-boot. Have you tried using the embedded NOR Flash on the RDB2 to load the binary image?

The following community thread has a setup to create the IVT using the same CAN2CAN project to load it into the NOR Flash, which should help you to run the M7 app without using the u-boot itself.

Unable to Boot M7 on Gold VIP RDB2(S32g274A) - NXP Community

Also, you can look into the "Software Enablement Guide" (also mentioned on the above-mentioned thread) to see more information regarding loading an image to the M7 core.

Please, let us know if this information was helpful or not.

wangzhenkai · ‎03-30-2023

how can I start m7 with llce sample binary being load with uboot for testing llce function?
can you provide examples of loading m7 app binary in uboot?

Daniel-Aguirre · ‎03-30-2023

Hi,

The only example provided by NXP comes from the IPCF package, which uses a different linker.

Since u-boot and the M7 app need access to the SRAM, you need to look into which address is available during u-boot, then you should be able modify the linker and load the application without a kernel panic.

If you are looking into only using the M7 core at this moment, we recommend loading the application to the embedded NOR Flash. If you are looking into loading both applications, we can recommend looking into the AN13750 available on the S32G2 product page (link: S32G2 Safe and Secure Vehicle Network Processor | NXP Semiconductors), which demonstrates a multicore application.

As for the entry address of the M7 core, should be the one being mapped to "intc_vector" inside the *.map file of your project.

Please, let us know.

wangzhenkai · ‎04-06-2023

hi Daniel,

I follow the way below， it works.

My operation is step2 ，i write the bin fille through u-boot , address is

cp.q 0x80000000 0x34300000 0x240000

startm7 0x34401000 ,

then m7 start ,but the uart0 output garbled code ,so that i can not boot A53 , what can i configure ,the uart0 can output normally.

1. Modify the Linker file, RAM SIZE from 4MB to 2MB and its offset also need to modify.

2. through CYGWIN write the bin file to SDcard. Then boot with SD Card it M7 will boot. Note: Gold VIP binaries should be flashed inside the board then do these changes M7 will boot.

3. M7 will boot , A53 will not boot. M7 bin is written SD card so A53 will not boot.

Daniel-Aguirre · ‎04-10-2023

Hi,

Thanks for your feedback.

Good to know you got it working.

If you are trying to implement a multicore application, we encourage you to read AN13750 available on the S32G2 product page (link: S32G2 Safe and Secure Vehicle Network Processor | NXP Semiconductors).

Aside from that, if you are loading an image from u-boot to the M7, remember to not re-initialize systems that could be already being initialized from u-boot (i.e clocks) so that it does not crash.

Please, let us know.

viswa_kondapall · ‎04-10-2023

Hi Daniel,

Issue not fixed yet. M7 is booting but A53 is not booting, which is overwritten with M7 bin/blob files.

I am unable figure out memory boundaries. LEB example project linker file updates and IPCF boundaries and others.

1. Where and how to find the memory boundaries. without overlapping. How to find in U-boot memory boundaries and M7 bootloader and M7 bin/blod file. Need help in understanding about memory boundaries without overlapping.

LEB project memory boundaries:

MEMORY
{
int_itcm : ORIGIN = 0x00000000, LENGTH = 0x00000000 /* 0KB - Not Supported */
int_dtcm : ORIGIN = 0x20000000, LENGTH = 0x00010000 /* 64K */
int_sram_shareable : ORIGIN = 0x22C00000, LENGTH = 0x00004000 /* 16KB */
int_sram : ORIGIN = 0x34000000, LENGTH = 0x00400000 /* 4MB */
int_sram_stack_c0 : ORIGIN = 0x34200000, LENGTH = 0x00002000 /* 8KB */
int_sram_stack_c1 : ORIGIN = 0x34202000, LENGTH = 0x00002000 /* 8KB */
int_sram_stack_c2 : ORIGIN = 0x34204000, LENGTH = 0x00002000 /* 8KB */
int_sram_no_cacheable : ORIGIN = 0x34206000, LENGTH = 0x00100000 /* 1MB, needs to include int_results */
ram_rsvd2 : ORIGIN = 0x34800000, LENGTH = 0 /* End of SRAM */

LLCE_CAN_SHAREDMEMORY : ORIGIN = 0x43800000 LENGTH = 0x3C800
LLCE_LIN_SHAREDMEMORY : ORIGIN = 0x4383C800 LENGTH = 0xa0
LLCE_BOOT_END : ORIGIN = 0x4383C8A0 LENGTH = 0x50
LLCE_MEAS_SHAREDMEMORY : ORIGIN = 0x4384FFDF LENGTH = 0x20
}

GoldVIP-gateway – Linker file: Not yet tested. in Couple of days, i will back with testing.

MEMORY
{
ipcf_shm (RW) : org = 0x34100000, len = 0x100000
exctable_C0 (RX) : org = 0x34500000, len = 0x400
exctable_C1 (RX) : org = 0x34500400, len = 0x400
exctable_C2 (RX) : org = 0x34500800, len = 0x400
reset (RX) : org = 0x34500C00, len = 0x100
rom (RX) : org = 0x34500D00, len = 0x0df300
ram (RWX): org = 0x345E0000, len = 0x21f000
endram (RX) : org = 0x347ff000, len = 0x100

LLCE_CAN_SHAREDMEMORY : org = 0x43800000, len = 0x3D000
LLCE_LIN_SHAREDMEMORY : org = 0x4383C800, len = 0xa0
LLCE_BOOT_END : org = 0x4383C8A0, len = 0x50
}

Please help me in understanding in memory mapping and assignment.

Regards,

Viswa

Daniel-Aguirre · ‎04-10-2023

Hi,

As told previously on the following thread:

Unable to Boot M7 on Gold VIP RDB2(S32g274A) - NXP Community

GoldVIP is not recommended to create a multicore application. We encourage to read AN13750 for this topic.

As for the memory boundaries, they are provided once u-boot/atf is built (shown on AN13750). There is no direct documentation that shows this memory map for u-boot.

You could try and follow the u-boot makefile to understand where the linker is found and what sections are created, but this should be done by the developer.

Please, let us know.

viswa_kondapall · ‎04-10-2023

Hi Daniel,

If its that straight forward, i might not posted. Sorry to say but fact at my understanding is " NXP GoldVIP 1.5.0 only will work and NXP is not interested to answer it or will not reveal or not interested ??.

I am not asking solutions for my work. What ever reference documents AN13423, AN1350 / LED document/Software enablement etc documents only i am following and those steps only we are following and we are facing problems/Issues but GoldVIP 1.5.0 binaries will work very much fine - how come it is ?????? How to understand your reply.

NXP Community GoldVIP is not recommended to create a multicore application. -- do you want to say use S32G but use only one CPU ???

Only one questions in my mind -- How Gold VIp 1.5.0 is working good for NXP and how it is not working for me even though following NXP documents ??

1. I will follow your suggestion about U-boot makefile to check the address it is following.

Regards,

Viswa

Daniel-Aguirre · ‎04-10-2023

Hi,

We apologize and we understand the frustration. We do not recommend GoldVIP for a multicore application since the main idea of it is to provide an evaluation scenario for the S32G platform. The following is said on the GoldVIP product brief:

"GoldVIP provides a reference software integration platform for vehicle network processing applications like vehicle computers and service-oriented gateways."

It is not that it won't work, it is just that more care should be taken if creating a multicore application on an already designed application. Since GoldVIP has a defined task for each core on the system, care should be taken.

GoldVIP has a dedicated Developer's Guide which explains the possibilities of customization under the GoldVIP itself. As you are saying, more possibilities can be available, but we are not expecting for GoldVIP to provide more than the Developer's Guide is telling, since other Application Notes/examples area available for other different scenarios.

As told before, if you want to create a multicore application which does not relate to the GoldVIP reference application, we do recommend looking into the AN13750, which does provide a more generic approach of a multicore application under the S32G2 platform.

Please, let us know.

viswa_kondapall · ‎03-30-2023

Hi,

As per Software enablement Guide.

1. Modify the Linker file, RAM SIZE from 4MB to 2MB and its offset also need to modify.

2. through CYGWIN write the bin file to SDcard. Then boot with SD Card it M7 will boot. Note: Gold VIP binaries should be flashed inside the board then do these changes M7 will boot.

3. M7 will boot , A53 will not boot. M7 bin is written SD card so A53 will not boot.

Here me too not getting how boot A53 and M7. I have a suggestion. Gold VIP binaries- workspace-goldvip - gnu.ld linker has so other MEMORY parameters with that linker file M7 may boot with A53.

Regards,

Viswa.

wangzhenkai · ‎04-06-2023

thanks, it works

viswa_kondapall · ‎04-10-2023

Hi Wangzhenkai,

A53 also booted ?? Did you tested with goldvip-can-gw linker file memory address ??

Regards,

Viswa