Hi,
I encountered a byte endian error when using flexcan in DMA mode on goldbox. Because there is no DMA, the send is normal. When the first frame CAN FD message is received, there is no problem with the byte order in the message and CAN ID can be received. When the second frame CAN FD message is received, the byte order in the message is wrong, and the order of every four bytes is reversed, and the CAN ID cannot be received at the same time. The CAN FD messages are continued to be received, and the byte order error problem occurs every interval frame. I know DMA transfers are on a 4-byte basis, but I don't know if there's something wrong with the DMA configuration. I couldn't find a place to configure byte endian order. I used an S32DS 3.4 with an RTD of 3.0.2. The DMA configuration and FleCAN configuration are as follows:
Hi,
There is an implementation shown on the "S32 CAN Driver User Manual" with DMA and Enhanced RX FIFO [Page 39]:
The instructions talk about Tresos, but the same can be replicated on S32DS.
This configuration example uses "Can" and "Mcl" peripherals. We see that you are using "FlexCAN" and "Dma_IP", which do seem to lack one of the configurations being mentioned on the UM.
Also, there seems to be a limitation on the driver as told on the "S32 CAN Driver User Manual" [Page 37]:
"if DMA is used, the User need to input exactly Can Dma callback function name (detailed in the description of CanEnhanceFiFoDmaRef node) and select exactly corresponding dma hardware chanel in Mcl driver."
Which seems to refer to the Can and Mcl peripherals, not the FlexCAN and DMA peripherals. This may be a general comment, but we recommend looking into the configuration steps for Can and Mcl drivers.
Please, let us know if this information helps you or not.
