S32G274 Debugging CAN Communication After Dual-Core Boot-up

[sdx111]

1. The phenomenon I observed is that after A core loads PFE and starts up, the flexcan0 of M7 cannot communicate normally. The specific situation is that at this time, when I use the cantest upper computer to send CAN messages to flexcan0, the message can be sent successfully, but the flexcan0 of M7 does not respond at all and does not send anything externally. Therefore, I infer that M7 has crashed at this time. So the two registers you mentioned are definitely normal.
2. I would like to ask how to read the values of relevant registers after starting Linux. What command is it?
3. After enabling the PFE firmware loading, which files and functions in the program are the specific loading processes? If I need to change HIL1 to HIL0 in it, how should I do it?

(Note: This thread is branched from https://community.nxp.com/t5/S32G/S32G274-Debugging-CAN-Communication-After-Dual-Core-Boot-up/m-p/23... )

[Bio_TICFSL]

Hello,

The M7 core appears to crash due to a conflict with the PFE (Packet Forwarding Engine) subsystem after Linux boots on the A53 core, as PFE and Ethernet/CAN resources can be mutually exclusive on the S32G platform

. 

1. Register Reading Command in Linux 

To read the register values of flexcan0 (or any peripheral) after Linux has booted, use the devmem tool. 

• Command Format: devmem <physical_address> <width>
• Example (reading FLEXCAN0 MCR register): Assuming base address is 0x401B4000, and MCR offset is 0x00:
  bash

  devmem 0x401B4000 32
  

• Alternative for dumping specific memory regions:
  bash

  cat /dev/mem | hexdump -C ...
  

   

Note: Ensure the clock for the module is enabled in Linux, otherwise devmem might cause a bus error/hang. 

2. PFE Firmware Loading Process

The PFE firmware is typically loaded by the Linux kernel pfeng driver during startup.

• Driver Source: drivers/net/ethernet/nxp/pfe/ in the kernel source.
• Firmware Files: Usually s32g_pfe_class.fw and s32g_pfe_util.fw found in /lib/firmware/.
• Key Functions: The loading process involves pfe_firmware_load() and subsequent initialization routines in the PFE driver that send the FW to the PFE processor. 

3. Changing HIL1 to HIL0

If you are using PFE-Master on the M7 core and need to change the High-Level Interface (HIL) to HIL0 (direct memory access) from HIL1 (often used in slave configurations), you need to modify the PFE driver initialization. 

• File to modify: pfe_module.c or similar PFE driver files in drivers/net/ethernet/nxp/pfe/.
• Procedure:
  1. Locate the PFE driver code in the kernel source.
  2. Find the initialization structures where the HIL mode is configured (look for pfe_hil_mode or similar variables).
  3. Change the configuration from 1 (HIL1) to 0 (HIL0).
  4. Recompile the PFE driver (pfeng.ko or built-in). 

Note: PFE-Master often runs on M7, and PFE-Slave on A53. If you run both, HIL settings must match. 

Additional Troubleshooting Suggestions

• Stop PFE in U-Boot: To verify the conflict, stop PFE in U-Boot before loading Linux using pfeng stop.
• Check Clock/Pin Conflict: PFE and FlexCAN can share clocks or have pin multiplexing conflicts. Check that the device tree on the A-core side does not enable PFE for the same resources used by M7.
• M7 Crash: If M7 crashes, check its memory region using devmem to see if the M7 code still exists or if it has been overwritten. 

Regards