Current BSP version on the board: bsp46.0-2.10.25-3-g0f10410d1-dirty
Current U-Boot version: U-Boot 2022.04-dirty
Also, some more notes on the testing: I was able to correctly change the pin mapping for all the PFE ports in the Linux kernel DTB, and all ports are working correctly when using Linux. Therefore, the pin mapping should be correct, and the port configuration should also be correct.
I can communicate with all three PFE ports in Linux. However, when I apply those exact changes to the DTSI files for TF-A, it still hangs at the DRAM section during boot.
What I have done currently is not declare the PFE2 MDIO and PFE2 pins in the PFE pinctrl DT in TF-A. I also declared pfe_netif2 as disabled and pfe2_mdio as disabled. When I do all of this in TF-A, I can get through boot and into Linux. Since the Linux kernel DTB has the correct pin mapping, which is the same as TF-A, I can still use all three PFE ports.
I am just very confused about why TF-A is still hanging when it seems to work fine with the Linux DTB.
Just to clarify, I disabled USB OTG and deleted the pin declaration in TF-A in both scenarios: where it hangs and where it goes through boot.