How to set pfe_mac2 to work in sgmii mode

[RiverHsieh]

Questions:

1. I want to set pfe_mac2 to work in sgmii mode, but the uboot pfe driver always sets rgmii mode, how to set it correctly.The error message, modified device tree and source code are as follows.

2. In the pfe initialization of the kernel, pfe_mac2 is correctly set in sgmii mode. Before this, uboot sets rgmii mode, will it affect the kernel work?

Platform Description

Hardware: customized platform reference from s32g274ardb2

bsp: bsp33

PFE Firmware: PFE-FW_S32G_1.3.0

Uboot error message:

Using external clock for PCIe0, CRNS
Frequency 100Mhz configured for PCIe0
Configuring PCIe0 as RootComplex(x1)&SGMII [XPCS0 OFF(PCIex1), XPCS1 1G]
Using external clock for PCIe1, CRNS
Frequency 100Mhz configured for PCIe1

eth0: eth_eqosFailed to set the frequency of mac2_rx_rgmii
Failed to enable mac2_rx_rgmii clock
PFE: emac0: sgmii emac1: none emac2: rgmii

Warning: eth_pfeng using MAC address from ROM
, eth1: eth_pfeng
Hit any key to stop autoboot: 2 ### 1 ### 0
PFE: emac0: sgmii emac1: none emac2: rgmii
Failed to set the frequency of mac2_rx_rgmii

Uboot modify:

config S32GEN1_HWCONFIG
- default "pcie0:mode=rc,clock=ext;pcie1:mode=sgmii,clock=ext,fmhz=125,xpcs_mode=2G5" if (PCIE_S32GEN1 && FSL_PFENG) && NXP_S32GRDB_BOARD
+ default "pcie0:mode=rc&sgmii,clock=ext,fmhz=100,xpcs_mode=1;pcie1:mode=rc&sgmii,clock=ext,fmhz=100,xpcs_mode=0" if (PCIE_S32GEN1 && FSL_PFENG) && NXP_S32GRDB_BOARD

#if CONFIG_IS_ENABLED(NXP_S32GRDB_BOARD)
PHY_INTERFACE_MODE_SGMII, /* SJA1110A */
PHY_INTERFACE_MODE_SGMII, /* ARQ107/ARQ113 */
- PHY_INTERFACE_MODE_RGMII /* KSZ9031 */
+ PHY_INTERFACE_MODE_SGMII /* */

#ifdef CONFIG_FSL_PFENG
# define PFENG_EMAC "0"
-# define PFENG_MODE "enable,sgmii,none,rgmii"
+# define PFENG_MODE "enable,sgmii,none,sgmii"

kernel device tree modify:

&pfe_netif2 {
- phy-mode = "rgmii-id";
+ phy-mode = "sgmii";

kernel set sgmii message:

[ 3.220296] pfeng 46000000.pfe: Interface selected: EMAC0: 0x4 EMAC1: 0xffffffff EMAC2: 0x4
[ 3.220999] pfeng 46000000.pfe: PFE controller reset done
[ 3.221045] pfeng 46000000.pfe: TX clock on EMAC0 for interface sgmii installed
[ 3.221108] pfeng 46000000.pfe: RX clock on EMAC0 for interface sgmii installed
[ 3.221140] pfeng 46000000.pfe: TX clock on EMAC2 for interface sgmii installed
[ 3.221165] pfeng 46000000.pfe: RX clock on EMAC2 for interface sgmii installed

[MayanksPatel]

Hi @RiverHsieh,

Can we close this ticket?

Thanks,

Mayank s Patel

[RiverHsieh]

Yes,can be closed

Thanks,
River

[MayanksPatel]

Hi @RiverHsieh,

Thank you for reaching out to us.

Can you please share the value of hwconfig variable from the u-boot console?

Use the below command to print the variable:

printenv hwconfig

[RiverHsieh]

Hi @MayanksPatel 

The problem has been solved, because when U-boot compiled the target board, the wrong PFENG_MODE was defined

Thanks

River