How to know whether any data is written or not to the specific eFuse address in S32G

[EddiePark]

Hi.

I have been implementing to write any data to the specific eFuse address in S32G.

/* Write Shadow OCOTP_GP6_127_96 */
1 . Ocotp_Ip_WriteShadowRegister(instance_Cfg0, OCOTP_GP6_127_96_SHADOW_REGISTER, DATA_TEST_0);

2. result = Ocotp_Ip_WriteEFuse(instance_Cfg0, OCOTP_GP6_127_96, DATA_TEST_0, false, true);

after 2. step, How to know whether any data is written or not to the specific eFuse address if  the value is RP (ReadProtect)+WP (WriteProtect)+OP (OverRideProtect)in S32G?

[Joey_z]

hi,EddiePark

Thank you for contacting us.

According to the S32G2RM.pdf and the Ocotp_Ip_WriteEFuse function, you can check ADDR_SYS and WRDATA_SYS register to know whether any data has been written to the specific eFuse address.

In addition , you can configure LockBit to use eFuse/shadow lock bit function by referring to S32G2_Fuse_Map_Tables.xlsx.

BR

Joey

[EddiePark]

Hi.

Thank you for your response.

In current, I have one issue for eFuse.

The below code works normally in case any data is written the specific eFuse address which is empty, 

But crc error happens in case the data of specific eFuse address is updated and I cannot read the data of specific address,   LockBit is 0x00(Neither Fuse or Shadow are locked for Read, Write and Override)

please let me know what is problem.

Ocotp_Ip_ReadEFuse(instance_Cfg0, OCOTP_LOCK_CUSTOMER_LOCK_BITS, &u32Data);

/* Write Shadow OCOTP_GP6_127_96 */

Ocotp_Ip_WriteShadowRegister(instance_Cfg0, OCOTP_GP6_127_96_SHADOW_REGISTER, DATA_TEST_0);

/* Write Shadow OCOTP_GP6_159_128 */

Ocotp_Ip_WriteShadowRegister(instance_Cfg0, OCOTP_GP6_159_128_SHADOW_REGISTER, DATA_TEST_1);

ocotpStatus = Ocotp_Ip_WriteEFuse(instance_Cfg0, OCOTP_GP6_127_96, DATA_TEST_0, false, true);

if(STATUS_OCOTP_IP_SUCCESS != ocotpStatus){

gCDDExecuted = CDD_INIT_OCOTP_FAILURE;

}

ocotpStatus = Ocotp_Ip_WriteEFuse(instance_Cfg0, OCOTP_GP6_159_128, DATA_TEST_1, false, true);

if(STATUS_OCOTP_IP_SUCCESS != ocotpStatus){

gCDDExecuted = CDD_INIT_OCOTP_FAILURE;

}

ocotpStatus = Ocotp_Ip_CalculateAndWriteCrcValue(instance_Cfg0, CRC0_EFUSE_ADD, u32DataIsTestedCRC, (uint32)2U);

if(STATUS_OCOTP_IP_SUCCESS != ocotpStatus){

gCDDExecuted = CDD_INIT_OCOTP_FAILURE;

}

/*Update value CRC0 eFuse to CRC0 Shadow register. If MCU reset, you dont need this step*/

Ocotp_Ip_ReadEFuse(instance_Cfg0, CRC0_EFUSE_ADD, &u32Data);

Ocotp_Ip_WriteShadowRegister(instance_Cfg0, CRC0_SHADOW_REGISTER, u32Data);

/* Test CRC */

ocotpStatus = Ocotp_Ip_CrcTest(instance_Cfg0, CRC0_EFUSE_ADD, OCOTP_GP6_127_96, OCOTP_GP6_159_128);

[Joey_z]

hi,EddiePark

Thank you for your reply.

Will the problem still occur if you only write DATA_TEST_0 or DATA_TEST_1.

What is the value that you set DATA_TEST_1. Each eFuse bit cannot be cleared if set to 1.

BR

Joey

[EddiePark]

Hi

I write 20 to it when the data of specific fuse address is empty.

The value is 20 when  read the data of specific fuse address.

I write 21 to the same fuse address. The value is not 21 when read data for the same fuse address. So it seems that crc error happens.

Do you think what is problem?

What does mean that Each eFuse bit cannot be cleared if set to 1?

[EddiePark · Accepted solution]

Hi.

This issue is resolved.

Thank you for your support.

BRs.