Hello,
We are trying to use LINFlexd for UART communication in DMA based implementation.
While the same Linflexd channel can be used successfully when we use it with interrupt based implementation, I can't see data being transferred after the DMA0_Ch0 ISR is triggered for DMA based implementation.
Some of the inconsistencies that we observed is related to LIN register values when Tx is triggered.
When we select UART mode in UARTCR, as per the reference manual LINTCSR[mode] should always be set to 1 (UART mode). But, as shown in the screenshot below, it is still set in LIN mode, while UARTCR is in UART Mode.
Further, the data registers are both showing not-accessible (????)
Although, before the actual data transfer, the data registers are accessible:
Thank you for helping.
