Dear sir,
We want to set the pin PF_03(83 SIUL2 0) as CLKOUT0 and generate a 500KHz clock to it.
I've research the document S32G2 Reference Manual.pdf
Following is what I understand by chapter 23.1.2.6.1 CLKOUT n clock configuration.
1.
We should config the MSCR83. (address=4009_C38C)
bit21(OBE) set 1 as output driver enabled
bit14(SRE) set 110b <- this is not sure which one we should select
bit13(PUE) set 1 as push/pull enable
bit12(PUS) set 1 for pull up
bit0(SSS) set 001 for select CLKOUT0
if the CLKOUT0 is not opendrain, we should set push/pull by setting PUE and PUS as 1, am I right?
2.
We should config the Clock Mux 1 Divider 0 Control Register (MUX_1_DC_0)
Address is MC_CGM_0 base address: 4003_0000h, offset 0x348
bit31(DE) set 1 for Divider enabled
bit16(DIV) set 0x50 for 500KHz (40MHz / 0x50 = 500KHz if it can providing 40MHz)
Do I have misunderstanding for our propose from the document?
If it is correct procedure, Could you guide us how to implement it by using the device tree way? Appreciate.
Thanks,
BRs,
Gary