SPC5748G peripheral init fails

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SPC5748G peripheral init fails

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Contributor I

Hello,

I'm developing my SPC5748G board using S32DS with Processor Expert

After I read linflexd_uart_echo_mpc5748g sample code in S32DS then copy values for my project.

 

When I start debugging, peripheral can not get clock because of mode change timeout.

Mode Change is called in CLOCK_SYS_ConfigureMcMe when clock init

On my board, S_MTRANS bit never change into 0. Here's part of SDK.

static inline bool MC_ME_GetTransitionStatus(const MC_ME_Type * base)
{
        return (base->GS & MC_ME_GS_S_MTRANS_MASK) == 0U;
}

 

 

I checked ST's SPC5Studio SPC56xx SDK from another project

On that SDK, it checks MC_ME_IS's I_MTC bit instead of looking MTRANS bit.

So I modified S32 SDK to checking I_MTC bit.

 

Then system clock was good(160mhz), peripheral clock was fine and peripheral driver also could get clock fine.

But when it write LINFLEX Control Register on driver init, fault interrupt occurs.

 

Here's the problem line

static inline void LINFLEXD_EnterInitMode(LINFlexD_Type *base)
{
    uint32_t regValTemp;

    regValTemp = base->LINCR1;
    regValTemp &= ~(LINFlexD_LINCR1_SLEEP_MASK);
    regValTemp |= LINFlexD_LINCR1_INIT(1UL);
    base->LINCR1 = regValTemp;                // Fail on this line
}

 

 

Same problem on Timer Driver

static inline void PIT_EnableTimer(PIT_Type * const base,
                                   const uint8_t timerType)
{
#if FEATURE_PIT_HAS_RTI_CHANNEL
    if (timerType != 0U)
    {
        base->MCR &= ~PIT_MCR_MDIS_RTI_MASK;
    }
    else
#endif
    {
        (void)timerType;
        base->MCR &= ~PIT_MCR_MDIS_MASK;      // fail on this line
    }
}

 

 

This is my board's clock summary( 0hz are omitted )

Clock sources
SIRC clock [Hz] 128000 128kHz
FIRC clock [Hz] 16000000 16MHz
SXOSC clock [Hz] 32000 32kHz
FXOSC clock [Hz] 32000000 32MHz
PLL_PHIO clock [Hz] 160000000 160MHz
PLL_PHI1 clock [Hz] 80000000 80MHz
SIRC undivided clock [Hz] 128000 128kHz
FIRC undivided clock [Hz] 16000000 16MHz
SXOSC undivided clock [Hz] 32000 32kHz
FXOSC undivided clock [Hz] 32000000 32MHz
ENET_RMII clock [Hz] 50000000 50MHz

System clocks
SYS clock [Hz] 160000000 160MHZ
S160 clock [Hz] 160000000 160MHz
S80 clock [Hz] 80000000 80MHZ
S40 clock [Hz] 40000000 40MHz
F40 clock [Hz] 40000000 40MHz
F80 clock [Hz] 80000000 80MHz
FS80 clock [Hz] 80000000 80MHZ
F20 clock [Hz] 20000000 20MHz

Peripheral clocks
DMAO_CLK [Hz] 80000000 80MHZ
DMAMUXO_CLK [Hz] 80000000 80MHz
DMAMUX1_CLK [Hz] 80000000 80MHz
LINO_CLK [Hz] 40000000 40MHz
LIN1_CLK [Hz] 80000000 80MHz
LIN2_CLK [Hz] 80000000 80MHz
LIN3_CLK [Hz] 80000000 80MHz
LIN4_CLK [Hz] 80000000 80MHz
LINS_CLK [Hz] 80000000 80MHz
LIN6_CLK [Hz] 80000000 80MHz
LIN7_CLK [Hz] 80000000 80MHz
LINS_CLK [Hz] 80000000 80MHz
LIN9_CLK [Hz] 80000000 80MHz
LIN10_CLK [Hz] 80000000 80MHz
LIN11_CLK [Hz] 80000000 80MHz
LIN12_CLK [Hz] 80000000 80MHz
LIN13_CLK [Hz] 80000000 80MHz
LIN14_CLK [Hz] 80000000 80MHz
LIN15_CLK [Hz] 80000000 80MHz
LIN16_CLK [Hz] 80000000 80MHz
LIN17_CLK [Hz] 80000000 80MHz
PITRTIO_CLK [Hz] 32000000 32MHz
PITO_CLK [Hz] 40000000 40MHz

 

 

Here's main code

int main(void)
{
  /* Write your local variable definition here */

  /*** Processor Expert internal initialization. DON'T REMOVE THIS CODE!!! ***/
  #ifdef PEX_RTOS_INIT
    PEX_RTOS_INIT();                   /* Initialization of the selected RTOS. Macro is defined by the RTOS component. */
  #endif
  /*** End of Processor Expert internal initialization.                    ***/

  /* Write your code here */
  /* For example: for(;;) { } */

	/* Clock Init */
	CLOCK_SYS_Init(g_clockManConfigsArr, CLOCK_MANAGER_CONFIG_CNT, g_clockManCallbacksArr, CLOCK_MANAGER_CALLBACK_CNT);
	CLOCK_SYS_UpdateConfiguration(0, CLOCK_MANAGER_POLICY_AGREEMENT);

	PINS_DRV_Init(NUM_OF_CONFIGURED_PINS, g_pin_mux_InitConfigArr);

#if 0
	LINFLEXD_UART_DRV_Init(INST_LINFLEXD_UART1, &linflexd_uart1_State, &linflexd_uart1_InitConfig0);
	LINFLEXD_UART_DRV_SendDataBlocking(INST_LINFLEXD_UART1, (uint8_t*)"hello, World!\r\n", 15U, 500U);
#endif

#if 0	
	PIT_DRV_Init(INST_PIT1, &pit1_InitConfig );
	PIT_DRV_InitChannel(INST_PIT1, &pit1_ChnConfig0);
	PIT_DRV_StartChannel(INST_PIT1, pit1_ChnConfig0.hwChannel);

	OSIF_TimeDelay(0);
#endif
	for(;;)
	{
		  PINS_DRV_TogglePins(PTB, 0xC);
		  delay_ms(50);
	}

  /*** Don't write any code pass this line, or it will be deleted during code generation. ***/
  /*** RTOS startup code. Macro PEX_RTOS_START is defined by the RTOS component. DON'T MODIFY THIS CODE!!! ***/
  #ifdef PEX_RTOS_START
    PEX_RTOS_START();                  /* Startup of the selected RTOS. Macro is defined by the RTOS component. */
  #endif
  /*** End of RTOS startup code.  ***/
  /*** Processor Expert end of main routine. DON'T MODIFY THIS CODE!!! ***/
  for(;;) {
    if(exit_code != 0) {
      break;
    }
  }
  return exit_code;
  /*** Processor Expert end of main routine. DON'T WRITE CODE BELOW!!! ***/
} /*** End of main routine. DO NOT MODIFY THIS TEXT!!! ***/

 

 

Please have mercy on me

Thank you.

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NXP TechSupport
NXP TechSupport

Hi,

 

try to check Mode Entry module status registers to know more about transition status and if clock sources and peripherals clocks are active.

 

BR, Petr

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