MPC5744p- Independently control flexpwm outputs (i.e PWMA, B, and X)

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MPC5744p- Independently control flexpwm outputs (i.e PWMA, B, and X)

Contributor I

(I already posted this in another part of the forums but I thought it might make more sense to post here)

Hi, I am not able to use processor expert to independently set the duty cycles of each submodule on PWMA, B and X

Currently, I have initialized the PWM with submodule 0 as the "master" for submodule 3(I also initially set up submodule 2 the same way but because of issues with duty cycle control I scaled it back where im only trying to control A2 and X3) . For submodule 3 the counter init is Submodule 0 master sync, The channel pair operation is independent, the reload logic is full and reload source is set to master reload source.

Initialization code snippet:

FLEXPWM_DRV_SetupPwm(INST_FLEXPWM0, 0U, &flexPWM0_flexpwm_submodule_0_master_setup, &flexPWM0_flexpwm_submodule_0_master_signal_setup);
FLEXPWM_DRV_SetupPwm(INST_FLEXPWM0, 2U, &flexPWM0_flexpwm_submodule_2_setup, &flexPWM0_flexpwm_submodule_2_signal_setup);
FLEXPWM_DRV_SetupPwm(INST_FLEXPWM0, 3U, &flexPWM0_flexpwm_submodule_3_setup, &flexPWM0_flexpwm_submodule_3_signal_setup);



I initialized the submodules and I have been able to get output however i'm having issues getting the duty cycles of PWMX correctly.

I read in the reference manual that if I configure the submodule to use submodule 0 as a "master" with counter init and also if I set the reload logic to full I should be able to update VAL 0 and VAL 1.

I am currently trying to set PWMX3 like this.

uint16_t pulse_width_val = APP_IO_PWM_PERIOD_COUNT * (0.01 * (100u - duty_cycle_pct));
flexpwmBase->SUB[3].VAL0 = pulse_width_val;
flexpwmBase->MCTRL |= FlexPWM_MCTRL_LDOK((3));

(for reference APP_IO_PWM_PERIOD_COUNT is 1600 which is the period)

When I set VAL0 to pulse_width_val the value of VAL0 does not update. It seems to be stuck at 50% duty cycle.  It also does not update when I try to set the LDOK bit. Sometimes however when stepping through the code and I set LDOK twice before and after I set VAL0 the value of VAL0 does change. This is not reliable though and during runtime it seems to not work. I have also tried creating a busy wait that waits for LDOK to clear to maybe slow down operation but this also does not seem to work correctly. I need to know the set of steps to correctly set VAL0 and VAL1 for PWMX so it updates.


I am not the best at explaining things so if any clarification is needed please ask. Thanks for any help

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NXP TechSupport
NXP TechSupport


I did not test driver usage, but I am not aware of such issue within module.

I put some comment on

BR, Petr 

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