why the sequence of defined variable is not different from the map file on s32ds?

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why the sequence of defined variable is not different from the map file on s32ds?

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jinshuaixu
Contributor V

hellow ,friends

        develop environment: s32ds 

        use chip:  S32K144

        in project ,l define variable as below:

__attribute__ ((section(".SRAM1"))) uint16_t SCRSys_DataVerH_C;
__attribute__ ((section(".SRAM1"))) uint16_t SCRSys_DataVerM_C;
__attribute__ ((section(".SRAM1"))) uint16_t SCRSys_DataVerL_C;
__attribute__ ((section(".SRAM1"))) uint16_t ExhTemp_tDSTrans_CUR[18];
__attribute__ ((section(".SRAM1"))) uint16_t TnkTemp_tTransAxis_CUR[26];
__attribute__ ((section(".SRAM1"))) uint16_t TnkTemp_tTrans_CUR[26];
__attribute__ ((section(".SRAM1"))) uint16_t TnkLvl_lTransAxis_CUR[17];
__attribute__ ((section(".SRAM1"))) uint16_t TnkLvl_lTrans_CUR[17];

 

 

             but in map file ,the sequence of the variable address is opposite, l want the sequence of the variable address is the same as the define variable, how to set it on s32ds

           

             in project map file

.SRAM1 0x1fffb000 0xda ./Sources/test.o
0x1fffb000 TnkLvl_lTrans_CUR
0x1fffb024 TnkLvl_lTransAxis_CUR
0x1fffb048 TnkTemp_tTrans_CUR
0x1fffb07c TnkTemp_tTransAxis_CUR
0x1fffb0b0 ExhTemp_tDSTrans_CUR
0x1fffb0d4 SCRSys_DataVerL_C
0x1fffb0d6 SCRSys_DataVerM_C
0x1fffb0d8 SCRSys_DataVerH_C
0x1fffb0dc . = ALIGN (0x4)

Original Attachment has been moved to: hello_world.zip

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stanish
NXP Employee
NXP Employee

Hi,

In fact this is rather a default GCC compiler behavior then a defect.  I've checked on both GCC ARM and e200 GCC with the same result.

Note: Compiler Optimization -O3 vs. non-optimized code the allocation is reversed each other

Relying on the C source object placement in the order as declared is definitely not a good practice.

If you need to ensure the allocation follows a certain sequence I'd declare it as a single C struct with multiple items representing the objects.

Hope it helps.

Stan

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