S32 Design Studio for ARM 2.2 Questions

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S32 Design Studio for ARM 2.2 Questions

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wei_w_he
Contributor IV

Dear Officer,

We are using S32K118 for our sunroof project and I just installed S32 DS for ARM and start to try, and got few questions:

1. Just to start a LED blink project, and using PE to generate the relevant code. Under component (PE), the clock module looks as below:

pastedImage_1.png

Then in the help menu provided by NXP, the clock module is  as below, It got extra CLCOK_SYS_xx APIs which are required for the coding. Hence Why It is not shown on my project component list? How to add in?

pastedImage_2.png

2. In term of debugging on actual HW, there are choices of debug flash, debug RAM, release flash and release RAM, what is difference for each?

3. What is difference between "Run as" compared with "Debug as" selection?

Thanks and best regards

He Wei

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wei_w_he
Contributor IV

Dear Jiri,

Based on the attached project files, Can you advice what is wrong with my project setting? I tried the NXP examples project but they are working fine. i.e debug_flash can remain after power down and up again. I checked the linker file, both mine and example project is exactly same.

Thanks and best regards

He Wei

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wei_w_he
Contributor IV

Dear Jiri,

My flash inker file as below:

/*
** ###################################################################
** Processor: S32K118 with 25 KB SRAM
** Compiler: GNU C Compiler
**
** Abstract:
** Linker file for the GNU C Compiler
**
** Copyright 2018 NXP
** All rights reserved.
**
** THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR
** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
** IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
** INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
** HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
** STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
** IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
** THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/

/* Entry Point */
ENTRY(Reset_Handler)

HEAP_SIZE = DEFINED(__heap_size__) ? __heap_size__ : 0x00000200;
STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x00000200;

/* If symbol __flash_vector_table__=1 is defined at link time
* the interrupt vector will not be copied to RAM.
* Warning: Using the interrupt vector from Flash will not allow
* INT_SYS_InstallHandler because the section is Read Only.
*/
M_VECTOR_RAM_SIZE = DEFINED(__flash_vector_table__) ? 0x0 : 0x00C0;

/* Specify the memory areas */
MEMORY
{
/* Flash */
m_interrupts (RX) : ORIGIN = 0x00000000, LENGTH = 0x000000C0
m_flash_config (RX) : ORIGIN = 0x00000400, LENGTH = 0x00000010
m_text (RX) : ORIGIN = 0x00000410, LENGTH = 0x0003FBF0

/* SRAM_L */
m_custom (RW) : ORIGIN = 0x1FFFFC00, LENGTH = 0x00000400
/* SRAM_U */
m_data (RW) : ORIGIN = 0x20000000, LENGTH = 0x000030C0
m_data_2 (RW) : ORIGIN = 0x200030C0, LENGTH = 0x00002740
}

/* Define output sections */
SECTIONS
{
/* The startup code goes first into internal flash */
.interrupts :
{
__VECTOR_TABLE = .;
__interrupts_start__ = .;
. = ALIGN(4);
KEEP(*(.isr_vector)) /* Startup code */
__interrupts_end__ = .;
. = ALIGN(4);
} > m_interrupts

.flash_config :
{
. = ALIGN(4);
KEEP(*(.FlashConfig)) /* Flash Configuration Field (FCF) */
. = ALIGN(4);
} > m_flash_config

/* The program code and other data goes into internal flash */
.text :
{
. = ALIGN(4);
*(.text) /* .text sections (code) */
*(.text*) /* .text* sections (code) */
*(.rodata) /* .rodata sections (constants, strings, etc.) */
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
*(.init) /* section used in crti.o files */
*(.fini) /* section used in crti.o files */
*(.eh_frame) /* section used in crtbegin.o files */
. = ALIGN(4);
} > m_text

/* Section used by the libgcc.a library for fvp4 */
.ARM :
{
__exidx_start = .;
*(.ARM.exidx*)
__exidx_end = .;
} > m_text

__etext = .; /* Define a global symbol at end of code. */
__DATA_ROM = .; /* Symbol is used by startup for data initialization. */

.interrupts_ram :
{
. = ALIGN(4);
__VECTOR_RAM__ = .;
__RAM_START = .;
__interrupts_ram_start__ = .; /* Create a global symbol at data start. */
*(.m_interrupts_ram) /* This is a user defined section. */
. += M_VECTOR_RAM_SIZE;
. = ALIGN(4);
__interrupts_ram_end__ = .; /* Define a global symbol at data end. */
} > m_data

__VECTOR_RAM = DEFINED(__flash_vector_table__) ? ORIGIN(m_interrupts) : __VECTOR_RAM__ ;
__RAM_VECTOR_TABLE_SIZE = DEFINED(__flash_vector_table__) ? 0x0 : (__interrupts_ram_end__ - __interrupts_ram_start__) ;

.data : AT(__DATA_ROM)
{
. = ALIGN(4);
__DATA_RAM = .;
__data_start__ = .; /* Create a global symbol at data start. */
*(.data) /* .data sections */
*(.data*) /* .data* sections */
. = ALIGN(4);
__data_end__ = .; /* Define a global symbol at data end. */
} > m_data

__DATA_END = __DATA_ROM + (__data_end__ - __data_start__);
__CODE_ROM = __DATA_END; /* Symbol is used by code initialization. */

.code : AT(__CODE_ROM)
{
. = ALIGN(4);
__CODE_RAM = .;
__code_start__ = .; /* Create a global symbol at code start. */
__code_ram_start__ = .;
*(.code_ram) /* Custom section for storing code in RAM */
. = ALIGN(4);
__code_end__ = .; /* Define a global symbol at code end. */
__code_ram_end__ = .;
} > m_data

__CODE_END = __CODE_ROM + (__code_end__ - __code_start__);
__CUSTOM_ROM = __CODE_END;

/* Custom Section Block that can be used to place data at absolute address. */
/* Use __attribute__((section (".customSection"))) to place data here. */
/* Use this section only when MTB (Micro Trace Buffer) is not used, because MTB uses the same RAM area, as described in S32K Reference Manual. */
.customSectionBlock ORIGIN(m_custom) : AT(__CUSTOM_ROM)
{
__customSectionStart = .;
__customSection_start__ = .;
KEEP(*(.customSection)) /* Keep section even if not referenced. */
__customSection_end__ = .;
} > m_custom
__CUSTOM_END = __CUSTOM_ROM + (__customSection_end__ - __customSection_start__);

/* Uninitialized data section. */
.bss :
{
/* This is used by the startup in order to initialize the .bss section. */
. = ALIGN(4);
__BSS_START = .;
__bss_start__ = .;
*(.bss)
*(.bss*)
*(COMMON)
. = ALIGN(4);
__bss_end__ = .;
__BSS_END = .;
} > m_data_2

/* Put heap section after the program data */
.heap :
{
. = ALIGN(8);
__end__ = .;
__heap_start__ = .;
PROVIDE(end = .);
PROVIDE(_end = .);
PROVIDE(__end = .);
__HeapBase = .;
. += HEAP_SIZE;
__HeapLimit = .;
__heap_limit = .;
__heap_end__ = .;
} > m_data_2

/* Initializes stack on the end of block */
__StackTop = ORIGIN(m_data_2) + LENGTH(m_data_2);
__StackLimit = __StackTop - STACK_SIZE;
PROVIDE(__stack = __StackTop);
__RAM_END = __StackTop;

.stack __StackLimit :
{
. = ALIGN(8);
__stack_start__ = .;
. += STACK_SIZE;
__stack_end__ = .;
} > m_data_2

.ARM.attributes 0 : { *(.ARM.attributes) }

ASSERT(__StackLimit >= __HeapLimit, "region m_data_2 overflowed with stack and heap")
}

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wei_w_he
Contributor IV

Dear Jiri,

I tired debug_flash, debug_ram and is working,  but notice that for debug_flash, after I do a power down and power up of board (unplug and plug usb cable), the program seems is not "remain" inside the board and the board won't work as expected, even I tried the Flash method to load the EIF, it seems only "erased" the flash but not "programmed" it.

But when I flashed the jump start EIF downloaded from NXP,  It works as expected, i.e. after power down and up, the jump start is re-started.

What could be wrong for my code building and configuraiton?

Thanks and best regards

He Wei

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jiri_kral
NXP Employee
NXP Employee

Hi, 

try to attach to running target when you power cycle your board. Your program probably ends in some kind of exception:

pastedImage_1.png

Jiri

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wei_w_he
Contributor IV

Dear Jiri,

I try to run with "Attach to Running Target" as below:

pastedImage_1.png

And always got error as below:

pastedImage_2.png

Can you advise? Could be some IT issue on my company PC firewall?

Thanks and best regards

He Wei

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jiri_kral
NXP Employee
NXP Employee

Hi, 

It is some error in your code. Can you share your project? 

Jiri 

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wei_w_he
Contributor IV

Dear Jiri,

How to upload a zip file here? (I only see image and video upload..) 

I noticed the "good" firmware S32K116_EVB_JumpStart_Firmware.elf (download from NXP) is built based on S32K116 configuration but it is working fine in my K118 board. i.e. after power down and up, the program will resume.

For my project, I always configure as S32K118_64.

Thanks and best regards

He Wei

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jiri_kral
NXP Employee
NXP Employee

Hi, 

you can upload files if you switch into "Advanced editor mode":

pastedImage_1.png

Jiri

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wei_w_he
Contributor IV

Dear Jiri,

My code is attached. Basically it just light up the Green LED on S32K118 board. 

Thanks and best regards

He Wei

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wei_w_he
Contributor IV

Dear Jiri,

I ams searching around and find this post:

https://community.nxp.com/message/1037790 

It suppose the linker file got issue, but my linker file is auto-generated and I can't find the "1K" as mentioned in that post too.

BR

He Wei

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jiri_kral
NXP Employee
NXP Employee

Hi, 

You may find helpful this thread - SDK problem in S32 Design Studio for ARM 2.2 

You can compile your project as a Flash target or RAM target. Flash target is flashed into Program flash space, RAM target runs from RAM only. 

From HW perspective - there is no difference between Debug and Release target. Debug .elf file contains symbols and path to sources. Release .elf file is without this information and debug session shows only disassembled code. 

Well - to be honest - I never used Run As option - it looks that this can be used with Segger J-Link only. 

Best way how to start debug session is open Debug configurations, choose your debug probe and select debug config: 

pastedImage_6.png

Hope this helps. 

Jiri 

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wei_w_he
Contributor IV

Dear Jiri,

Thanks a lot. It really help. just to have a quick check:  even when code is loaded into flash, during CPU execution, the program will be loaded into RAM first then executed by CPU?

BR

He Wei

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jiri_kral
NXP Employee
NXP Employee

Hi, 

with Flash target is program executed directly from program flash (256 KB). RAM (25 KB) is used for variables and so on. As you can see, with RAM target you are limited to 25KB code size.

Jiri 

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wei_w_he
Contributor IV

Dear Jiri,

So if my program size is larger than 25KB, I can only choose  "debug flash", right?

BR

He Wei

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jiri_kral
NXP Employee
NXP Employee

Yes, you are right. 

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