Hi Martin,
It is 416BGA and we have designed our own controller and I connected oscilloscope probe on the pin with CLK for spi. I checked if it is connected to right pin by forcing the change of state when in GPIO mode. I was able to change state of the output from low to high and back. It is GPIO 93 ...so it is PCR93 register. Of course when checking SPI I changed back to Primary Function by setting 1 in PA field.
This must be something small in configuration that I still miss ...below there is piece of C code that use for it. Maybe the sequence is not right?
Robert
void SPI0_Init(void)
PCR[93].B.PA = 1; //SCKA - Primary Function
PCR[94].B.PA = 1; //SINA - Primary Function
PCR[95].B.PA = 1; //SOUTA - Primary Function
PCR[96].B.PA = 0; //CS GPIO - Chip Select
GPDO[96].B.PDOn = 1; //CS - OUTPUT BUFFER TO ONE
/*Configured Master mode */
//SPI_0.MCR.R = 0x80030001;
//DSPI_A.MCR.R = 0x80030001;
MCR.B.HALT = 1; //Stop transfers
MCR.B.MSTR = 1; //Enables Master Mode
MCR.B.CONT_SCKE = 1; //Continuous clock
MCR.B.DCONF = 0; //SPI
MCR.B.FRZ = 0; //Do not freeze in debug
MCR.B.MTFE = 0; //Modified Transfer Format disabled
MCR.B.DIS_TXF = 0; //TX FIFO is enabled
MCR.B.DIS_RXF = 0; //RX FIFO is enabled
MCR.B.CLR_TXF = 1; //Clear TX fifo counter
MCR.B.CLR_RXF = 1; //Clear RX fifo counter
MCR.B.MDIS = 0; //Enable module clock
MCR.B.HALT = 0; //Start transfers
/*
//SPI_0.MODE.CTAR[0].R = 0x78021004;
MODE.CTAR[0].R = 0x78021004;
MODE.CTAR[0].B.FMSZ = 15; //number of bits to be transferred (FMSZ + 1)
/*Receive FIFO Drain Request enable*/
//SPI_0.RSER.B.RFDF_RE = 1;
RSER.B.RFDF_RE = 1;
/* Exit HALT mode: go from STOPPED to RUNNING state*/
//SPI_0.MCR.B.HALT = 0x0;
MCR.B.HALT = 0x0;
