synchronizing AtoD with PWM on S12XE

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synchronizing AtoD with PWM on S12XE

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rlw
Contributor I

We are using an S12XEQ384

 

Looking at the documentation, the only way I can determine to synchronize anything to the PWM is to connect the PWM outputs to inputs on other pins.

 

Am I overlooking some other option?

 

Our hardware design did not anticipate a need for connecting PWM outputs to inputs on other pins, so the hardware people would have to relase a design revision and order new prototypes, so a software solution is strongly prefered.

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kef
Specialist I

According to table 13-6 in S12XE datasheet, there are 4 internal trigger sources for ATD modules. ETRIG0 to ETRIG3. Chapters 1.7 and 1.8 list these sources:

 

ETRIG0 Pulse width modulator channel 1

ETRIG1 Pulse width modulator channel 3

ETRIG2 Periodic interrupt timer hardware trigger 0

ETRIG3 Periodic interrupt timer hardware trigger 1

 

So it should be possible to synchronize ATD readings with PWM1 and PWM3 without external connections.

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rlw
Contributor I

Thanks, somehow missed this.

 

the docs don't specify what signal from the PWM module this is. Is this the waveform itself?

 

(minor problem, I need to sync with chan 7, but we aren't using chan 1, so maybe if the 2 are configured identically, the triggering will be close enough)

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kef
Specialist I

Yes, it is not specified, but I guess it is PWM waveform (though I would prefer period counter reset signal, which would make 0% and 100% duty cycle periods pulsed as well)

 

To sync two PWM channels you need to set period registers to the same value, write any data to corresponding PWMCNTx registers while channels are disabled, and finally enable both channels in the same write cycle to PWME.

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rlw
Contributor I

Occurs to me that the actual waveform could be an advantage because I could use the duty cycle of the secondary PWM channel to optimize the sample point of the feedback signal relative to the edges of the PWM drive signal.

 

(the feedback is only being sampled at a fifth of the PWM frequency, with the drive duty updated every 4th time, so there will more than enough time for both PWM channels to "settle in to" the new duty cycle before the next sample)

 

I will experimentally determine whever the ETRIG signal is the waveform or the period reset, then post results here.

 

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