question about SPI on MC9S12d64

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question about SPI on MC9S12d64

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thommes
Contributor III

Hello,

 

I am new to freescale and need help for a project at the university. My question is: Can i connect a RTC and a flash memory via SPI to the processor?
Normaly i would select the peripheral i need per chip select (SS by freescale, right?)? I am usind the "CardS12 modul" if it is important.
If there are any informations missing, please let me know.

 

thanks and regards,

 

Thomas 

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GordonD
Contributor IV

Thomas,

Yes, multiple SPI slave devices can be connected to a single SPI module configured as a master. You are correct in that you would need a separate slave select or chip select for each slave. Since the SPI module only has a single slave select (SS*) line, you will need to configure the SPI NOT to use the SS pin (i.e. SSOE = 0 in the SPICR1 register). This pin can then be used a GPIO, along with another GPIO pin, as salve select lines for the slave devices.

Regards,

Gordon

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GordonD
Contributor IV

Thomas,

Yes, multiple SPI slave devices can be connected to a single SPI module configured as a master. You are correct in that you would need a separate slave select or chip select for each slave. Since the SPI module only has a single slave select (SS*) line, you will need to configure the SPI NOT to use the SS pin (i.e. SSOE = 0 in the SPICR1 register). This pin can then be used a GPIO, along with another GPIO pin, as salve select lines for the slave devices.

Regards,

Gordon

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thommes
Contributor III

Hallo Gordon ,

thanks for your fast answer and just to get this right...

I do not use the original SlaveSelect-line but instead two GPIOs which "emulate" two SlaveSelect-lines?

Is there any information in manuals or datasheet which describes this functionality?

Regards,

Thomas

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GordonD
Contributor IV

Thomas,

Any two GPIO pins can be used as "manual" slave select lines. My point was that when SSOE = 0 in the SPICR1 register, the SPI SS* pin is available as GPIO. As described in the Reference Manual, when  SSOE = 1 the SS* pin will be automatically be asserted and de-asserted for each 8-bit transfer. For most slave devices, this is not compatible with the device's command structure. So, the automatic control of SS* is not useful for most slave devices. In fact even with a single slave device on the SPI bus, the SS* line would have to be controlled 'manually' for most slave devices.

Regards,

Gordon