incorrect variable pointer for XGATE thread

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incorrect variable pointer for XGATE thread

Contributor I
Hello Forum,

I' ve a problem with flw. subject.
I'm using CW 5.7 and a MC9S12XDP512 controller, all code is in assembler. I want to use also the XGATE for some interrupts, but in the moment I've flw. problem.
I placed the XGATE vector block and code in Flash and copied down to RAM during runtime. According to the user manual of the µctrl. it is possible for an XGATE vector to have an additional pointer to the service routine's variable space. This value is loaded into register R1 of XGATE before the thread is executed.
Now flw. problem. I'm using 12kByte RAM, both cores(HC12 and XGATE) shall use it . If the variable is located in RAM space between local address 2000h to 3FFFh (global 0FE000h to 0FFFFh) all works fine, register R1 is loaded correctly. If the variable is located between local address 1000h and 1FFFh (global 0FD000h to 0FDFFFh) I got an incorrect pointer, because only the lower byte is loaded correctly to register R1.
I think it have to be a linker or setting problem of my assembler. But in the moment no idea anymore where to look. Any help highly appreciated.
Attached used linker file.
/* Register space  */
/*    IO_SEG        = PAGED         0x0000 TO   0x07FF; intentionally not defined */

/* non-paged EEPROM */
      EEPROM        = READ_ONLY     0x0C00 TO   0x0FFF;

/* non-paged RAM */
      RAM           = READ_WRITE    0x1000 TO   0x3F9A  ALIGN 2[1:1]; /* word alignment for XGATE accesses */
      MY_STK        = READ_WRITE    0x3F9B TO   0x3FFF; /* 100byte stack */

/* non-banked FLASH */
      ROM_4000      = READ_ONLY     0x4000 TO   0x7FFF;

      ROM_C000      = READ_ONLY     0xC000 TO   0xF6FF;
       ISR           = READ_ONLY     0xF700 TO   0xF7FF;
      Boot          = READ_ONLY     0xF800 TO   0xFF0F;
       Vector        = READ_ONLY     0xFF10 TO   0xFFFF; /* intentionally not defined: used for VECTOR commands below */

/* paged EEPROM                     0x0800 TO   0x0BFF; addressed through EPAGE */
      EEPROM_FC     = READ_ONLY   0xFC0800 TO 0xFC0BFF;
      EEPROM_FD     = READ_ONLY   0xFD0800 TO 0xFD0BFF;
      EEPROM_FE     = READ_ONLY   0xFE0800 TO 0xFE0BFF;
/*    EEPROM_FF     = READ_ONLY   0xFF0800 TO 0xFF0BFF; intentionally not defined: equivalent to EEPROM */

/* paged RAM:                       0x1000 TO   0x1FFF; addressed through RPAGE */
      RAM_XGATE_STK = READ_WRITE  0xF81000 TO 0xF810FF; /* The stack is set by the XGATE compiler option -Cstv=8100 */
      RAM_F8        = READ_WRITE  0xF81100 TO 0xF81FFF ALIGN 2[1:1]; /* is also mapped to XGATE:  0x8100..0x8FFF */
      RAM_F9        = READ_WRITE  0xF91000 TO 0xF91FFF;
      RAM_FA        = READ_WRITE  0xFA1000 TO 0xFA1FFF;
      RAM_FB        = READ_WRITE  0xFB1000 TO 0xFB1FFF;
      RAM_FC        = READ_WRITE  0xFC1000 TO 0xFC1FFF;
      RAM_FD        = READ_WRITE  0xFD1000 TO 0xFD1FFF ALIGN 2[1:1]; /* is also mapped to XGATE:  0xD000..0xDFFF */
/*    RAM_FE        = READ_WRITE  0xFE1000 TO 0xFE1FFF; intentionally not defined: equivalent to RAM: 0x2000..0x2FFF */
/*    RAM_FF        = READ_WRITE  0xFF1000 TO 0xFF1FFF; intentionally not defined: equivalent to RAM: 0x3000..0x3FFF */

/* paged FLASH:                     0x8000 TO   0xBFFF; addressed through PPAGE */
      PAGE_E0       = READ_ONLY   0xE08000 TO 0xE0BFFF;
      PAGE_E1       = READ_ONLY   0xE18000 TO 0xE1BFFF;
       PAGE_FA       = READ_ONLY   0xFA8000 TO 0xFABFFF;
      PAGE_FB       = READ_ONLY   0xFB8000 TO 0xFBBFFF;
      PAGE_FC       = READ_ONLY   0xFC8000 TO 0xFCBFFF;
/*    PAGE_FD       = READ_ONLY   0xFD8000 TO 0xFDBFFF; intentionally not defined: equivalent to ROM_4000 */
      PAGE_FE       = READ_ONLY   0xFE8000 TO 0xFEAFFF;
/*    PAGE_FF       = READ_ONLY   0xFF8000 TO 0xFFBFFF; intentionally not defined: equivalent to ROM_C000 */


PLACEMENT /* here all predefined and user segments are placed into the SEGMENTS defined above. */
       //_PRESTART,              /* Used in HIWARE format: jump to _Startup at the code start */
      STARTUP,                /* startup data structures */
      ROM_VAR,                /* constant variables */
      STRINGS,                /* string literals */
      VIRTUAL_TABLE_SEGMENT,  /* C++ virtual table segment */
    //.ostext,                /* eventually OSEK code  */
      NON_BANKED,             /* runtime routines which must not be banked */
      COPY                    /* copy down information: how to initialize variables */
                              /* in case you want to use ROM_4000 here as well, make sure
                                 that all files (incl. library files) are compiled with the
                                 option: -OnB=b */
                        INTO  ROM_4000 /*, ROM_4000*/;

      CodeFESect        INTO  PAGE_FE;
                               PAGE_F7, PAGE_F6, PAGE_F5, PAGE_F4, PAGE_F3, PAGE_F1, PAGE_F0,   
                               PAGE_EF, PAGE_EE, PAGE_ED, PAGE_EC, PAGE_EB, PAGE_EA, PAGE_E9, PAGE_E8,
                              PAGE_E7, PAGE_E6, PAGE_E5, PAGE_E4, PAGE_E3, PAGE_E2, PAGE_E1, PAGE_E0;

      ConstSect         INTO  ROM_C000;
      EEPromSect        INTO  EEPROM;
      PageF2Sect        INTO  PAGE_F2;
      PageF6Sect        INTO  PAGE_F6;
       XGATE_VECTORS,          /* XGATE vector table has to be copied into RAM by HCS12X */
      XGATE_STRING,           /* XGATE string literals have to be copied into RAM by HCS12X */
      XGATE_CONST,            /* XGATE constants have to be copied into RAM by HCS12X */
      XGATE_CODE,             /* XGATE functions have to be copied into RAM by HCS12X */
      XGATE_STRING_RAM,       /* XGATE strings that should always go into RAM */
      XGATE_CONST_RAM,        /* XGATE constants what should always go into RAM */
      XGATE_CODE_RAM          /* XGATE code that should always run out of RAM */
                        INTO  ROM_XGATE; /* will be copied into RAM_F8 */

      SSTACK,           INTO  MY_STK;      /* allocate stack first to avoid overwriting variables */
      DEFAULT_RAM       INTO  RAM;        /* all variables, the default RAM location */

      PAGED_RAM         INTO  /* when using banked addressing for variable data, make sure to specify
                                  the option -D__FAR_DATA on the compiler command line */
                              /*RAM_F8,*/ RAM_F9, RAM_FA, RAM_FB, RAM_FC /*RAM_FD*/;

      PagedRAMSect      INTO  RAM_F8;

      ISR_Sect          INTO  ISR;  /* allocate the ISR into defined ROM area */

      VectorTable       INTO  Vector; /* allocate the vector table into defined ROM area, IVBR: default reset value */

      _PRESTART,              /* jump to _Startup at the code start, place into protected boot section */
      BootSect          INTO  Boot;


ENTRIES /* keep the following unreferenced variables */

//VECTOR 0 main  /* reset vector: this is the default entry point for an Assembly application. */
INIT main      /* for assembly applications: that this is as well the initialization entry point */


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2 Replies

NXP Employee
NXP Employee
Pitrunner, you may have an issue because the CPU 1000 to 1FFF space is actually the RPAGE area and doesn't map directly to a fixed area of XGATE/Global RAM. It's hard to say because we can't see how you are defining the XGATE vector table and how you share the variable definitions between the cores. You are probably correct that the linker is not placing the R1 value as you expect. You can check by looking at the contents of the XGATE vector table - the value loaded into R1 is the 16-bit value immediately after the XGATE thread vector.
Try placing the shared variables in a section with a global address and then using the RPAGE or GPAGE space on the CPU to access it.
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Contributor I
Hello Steve,
thanks for you answer. I know how to check the value for R1 and I see that only the lower byte is correct. Your proposal to  place  the variable  in a section above 2000h is okay but not so easy to realize for me, because I have nearly 10kB variables in RAM, and some buffers are more as 2KB big. So I would like not to rearrange the RAM due to the fact that I got not the right pointer value. Attached the vector table, a part of the linker map and the XGATE init, may be you have another suggestions for me.

Section Name                    Size  Type     From       To       Segment
CodeFDSect                     13837     R     0x4000     0x760C   ROM_4000
CodeFESect                      3214     R   0xFE8000   0xFE8C8D   PAGE_FE
ConstSect                      10268     R     0xC000     0xE81B   ROM_C000
EEPromSect                       884     R      0xC00      0xF73   EEPROM
PageF2Sect                     16384     R   0xF28000   0xF2BFFF   PAGE_F2
PageF6Sect                      4096     R   0xF68000   0xF68FFF   PAGE_F6
XGATE_CODE                       608     R   0xFEB100   0xFEB35F   ROM_XGATE
.stack                           101   R/W     0x3F9B     0x3FFF   MY_STK
RAMSect                         9808   R/W     0x1000     0x364F   RAM
PagedRAMSect                    2056   R/W   0xF81100   0xF81907   RAM_F8
ISR_Sect                         230     R     0xF700     0xF7E5   ISR
VectorTable                      240     R     0xFF10     0xFFFF   Vector
.init                             23     R     0xF800     0xF816   Boot
BootSect                        1227     R     0xF817     0xFCE1   Boot

Summary of section sizes per section type:
READ_ONLY (R):        C743 (dec:    51011)
READ_WRITE (R/W):     2EBD (dec:    11965)

          MOVW    #XGMCTL_CLEAR,XGMCTL    ;clear all XGMCTL bits
          BRSET   XGCHID,#0FFh,XGATEINIT  ;wait until possible current thread is done

          LDX     #GLOBAL(XGATE_VectorTable);initialize the XGATE vector block and         
           STX     XGVBR               ;set the XGVBR register to its start address
           LDX     #XGIF0              ;clear all channel interrupt flags
          LDD     #0FFFFh             ;by writing 1 to
          STD     2,X+                ;XGIF0
          STD     2,X+                ;XGIF1
          STD     2,X+                ;XGIF2
          STD     2,X+                ;XGIF3         
           STD     2,X+                ;XGIF4
          STD     2,X+                ;XGIF5
          STD     2,X+                ;XGIF6
          STD     2,X+                ;XGIF7
           MOVW    #0FF00h,XGSWT       ;clear all software triggers         

 ;* Copy the XGATE program code from Flash to the RAM
          LDY     #GLOBAL(__SEG_START_XGATE_CODE)       ;we use GPAGE for the src (to flash)
          STAB    GPAGE
          LDX     #__SEG_RELOCATE_TO_XGATE_CODE         ;and RPAGE to the RAM
          STAB    RPAGE

          LDD     #__SEG_SIZE_XGATE_CODE
          GLDAA   1,Y+                ;load a single code byte from flash
          STAA    1,X+                ;and store it to RAM
          DECW    0,SP
          BNE     CopyLoop
          PULD                        ;restore stack

          MOVB    #FDRAM,RPAGE


; XGATE   Vector table

; Channel_# = Vector address / 2                      
 Channel_00: DC.W %XGATE_16(ErrorHandler),               %XGATE_16(  0)          ; Reserved
Channel_01: DC.W %XGATE_16(ErrorHandler),               %XGATE_16(  1)          ; Reserved
Channel_02: DC.W %XGATE_16(ErrorHandler),               %XGATE_16(  2)          ; Reserved
Channel_03: DC.W %XGATE_16(ErrorHandler),               %XGATE_16(  3)          ; Reserved
Channel_04: DC.W %XGATE_16(ErrorHandler),               %XGATE_16(  4)          ; Reserved
Channel_05: DC.W %XGATE_16(ErrorHandler),               %XGATE_16(  5)          ; Reserved
Channel_06: DC.W %XGATE_16(ErrorHandler),               %XGATE_16(  6)          ; Reserved
Channel_07: DC.W %XGATE_16(ErrorHandler),               %XGATE_16(  7)          ; Reserved
Channel_08: DC.W %XGATE_16(ErrorHandler),               %XGATE_16(  8)          ; Spurious Interrupt
Channel_09: DC.W %XGATE_16(ErrorHandler),               %XGATE_16(  9)          ; Reserved
Channel_0A: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 10)          ; Reserved
Channel_0B: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 11)          ; Reserved
Channel_0C: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 12)          ; Reserved
Channel_0D: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 13)          ; Reserved
Channel_0E: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 14)          ; Reserved
Channel_0F: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 15)          ; Reserved
Channel_10: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 16)          ; Reserved
Channel_11: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 17)          ; Reserved
Channel_12: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 18)          ; Reserved
Channel_13: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 19)          ; Reserved
Channel_14: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 20)          ; Reserved
Channel_15: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 21)          ; Reserved
Channel_16: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 22)          ; Reserved
Channel_17: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 23)          ; Reserved
Channel_18: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 24)          ; Reserved
Channel_19: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 25)          ; Reserved
Channel_1A: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 26)          ; Reserved
Channel_1B: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 27)          ; Reserved
Channel_1C: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 28)          ; Reserved
Channel_1D: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 29)          ; Reserved
Channel_1E: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 30)          ; Reserved
Channel_1F: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 31)          ; Reserved
Channel_20: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 32)          ; Reserved
Channel_21: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 33)          ; Reserved
Channel_22: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 34)          ; Reserved
Channel_23: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 35)          ; Reserved
Channel_24: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 36)          ; Reserved
Channel_25: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 37)          ; Reserved
Channel_26: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 38)          ; Reserved
Channel_27: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 39)          ; Reserved
Channel_28: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 40)          ; Reserved
Channel_29: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 41)          ; Reserved
Channel_2A: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 42)          ; Reserved
Channel_2B: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 43)          ; Reserved
Channel_2C: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 44)          ; Reserved
Channel_2D: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 45)          ; Reserved
Channel_2E: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 46)          ; Reserved
Channel_2F: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 47)          ; Reserved
Channel_30: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 48)          ; XSRAM20K Access Violation
Channel_31: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 49)          ; XGATE Software Error Interrupt    
 Channel_32: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 50)          ; XGATE Software Trigger 7          
 Channel_33: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 51)          ; XGATE Software Trigger 6          
 Channel_34: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 52)          ; XGATE Software Trigger 5          
 Channel_35: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 53)          ; XGATE Software Trigger 4          
 Channel_36: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 54)          ; XGATE Software Trigger 3          
 Channel_37: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 55)          ; XGATE Software Trigger 2          
 Channel_38: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 56)          ; XGATE Software Trigger 1          
 Channel_39: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 57)          ; XGATE Software Trigger 0          
 Channel_3A: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 58)          ; Periodic Interrupt Timer          
 Channel_3B: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 59)          ; Periodic Interrupt Timer          
 Channel_3C: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 60)          ; Periodic Interrupt Timer          
 Channel_3D: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 61)          ; Periodic Interrupt Timer          
 Channel_3E: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 62)          ; Reserved                          
 Channel_3F: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 63)          ; Autonomous Periodical interrupt API
Channel_40: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 64)          ; Low Voltage interrupt LVI
Channel_41: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 65)          ; IIC1 Bus                
 Channel_42: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 66)          ; SCI5                    
 Channel_43: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 67)          ; SCI4                    
 Channel_44: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 68)          ; SCI3                    
 Channel_45: DC.W %XGATE_16(SCI2_Thread),                %XGATE_16( PRTBUF)      ; SCI2                    
 Channel_46: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 60)          ; PWM Emergency Shutdown  
 Channel_47: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 71)          ; Port P Interrupt        
 Channel_48: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 72)          ; CAN4 transmit           
 Channel_49: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 73)          ; CAN4 receive            
 Channel_4A: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 74)          ; CAN4 errors             
 Channel_4B: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 75)          ; CAN4 wake-up            
 Channel_4C: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 76)          ; CAN3 transmit           
 Channel_4D: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 77)          ; CAN3 receive            
 Channel_4E: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 78)          ; CAN3 errors             
 Channel_4F: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 79)          ; CAN3 wake-up            
 Channel_50: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 80)          ; CAN2 transmit
Channel_51: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 81)          ; CAN2 receive
 Channel_52: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 82)          ; CAN2 errors 
 Channel_53: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 83)          ; CAN2 wake-up
 Channel_54: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 84)          ; CAN1 transmit
Channel_55: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 85)          ; CAN1 receive
 Channel_56: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 86)          ; CAN1 errors 
 Channel_57: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 87)          ; CAN1 wake-up
 Channel_58: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 88)          ; CAN0 transmit
Channel_59: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 89)          ; CAN0 receive
 Channel_5A: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 90)          ; CAN0 errors 
 Channel_5B: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 91)          ; CAN0 wake-up
 Channel_5C: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 92)          ; FLASH
 Channel_5D: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 93)          ; EEPROM
Channel_5E: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 94)          ; SPI2 
 Channel_5F: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 95)          ; SPI1
Channel_60: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 96)          ; IIC0 Bus                        
 Channel_61: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 97)          ; Reserved                        
 Channel_62: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 98)          ; CRG Self Clock Mode             
 Channel_63: DC.W %XGATE_16(ErrorHandler),               %XGATE_16( 99)          ; CRG PLL lock                    
 Channel_64: DC.W %XGATE_16(ErrorHandler),               %XGATE_16(100)          ; Pulse Accumulator B Overflow    
 Channel_65: DC.W %XGATE_16(ErrorHandler),               %XGATE_16(101)          ; Modulus Down Counter underflow  
 Channel_66: DC.W %XGATE_16(ErrorHandler),               %XGATE_16(102)          ; Port H                          
 Channel_67: DC.W %XGATE_16(ErrorHandler),               %XGATE_16(103)          ; Port J                          
 Channel_68: DC.W %XGATE_16(ErrorHandler),               %XGATE_16(104)          ; ATD1                            
 Channel_69: DC.W %XGATE_16(ErrorHandler),               %XGATE_16(105)          ; ATD0                            
 Channel_6A: DC.W %XGATE_16(SCI1_Thread),                %XGATE_16( RECEIBEBUF1) ; SCI1                            
 Channel_6B: DC.W %XGATE_16(SCI0_Thread),                %XGATE_16( RECEIVEBUF)  ; SCI0                    
 Channel_6C: DC.W %XGATE_16(ErrorHandler),               %XGATE_16(108)          ; SPI0                            
 Channel_6D: DC.W %XGATE_16(ErrorHandler),               %XGATE_16(109)          ; Pulse accumulator input edge    
 Channel_6E: DC.W %XGATE_16(ErrorHandler),               %XGATE_16(110)          ; Pulse accumulator A overflow    
 Channel_6F: DC.W %XGATE_16(ErrorHandler),               %XGATE_16(111)          ; Enhanced Capture Timer overflow 
 Channel_70: DC.W %XGATE_16(ErrorHandler),               %XGATE_16(112)          ; Enhanced Capture Timer channel 7                                
 Channel_71: DC.W %XGATE_16(ErrorHandler),               %XGATE_16(113)          ; Enhanced Capture Timer channel 6
Channel_72: DC.W %XGATE_16(ErrorHandler),               %XGATE_16(114)          ; Enhanced Capture Timer channel 5
Channel_73: DC.W %XGATE_16(ErrorHandler),               %XGATE_16(115)          ; Enhanced Capture Timer channel 4
Channel_74: DC.W %XGATE_16(ErrorHandler),               %XGATE_16(116)          ; Enhanced Capture Timer channel 3
Channel_75: DC.W %XGATE_16(ErrorHandler),               %XGATE_16(117)          ; Enhanced Capture Timer channel 2
Channel_76: DC.W %XGATE_16(ErrorHandler),               %XGATE_16(118)          ; Enhanced Capture Timer channel 1
Channel_77: DC.W %XGATE_16(ErrorHandler),               %XGATE_16(119)          ; Enhanced Capture Timer channel 0
Channel_78: DC.W %XGATE_16(ErrorHandler),               %XGATE_16(120)          ; Real Time Interrupt
Channel_79: DC.W %XGATE_16(ErrorHandler),               %XGATE_16(121)          ; Reserved
Channel_7A: DC.W %XGATE_16(ErrorHandler),               %XGATE_16(122)          ; Reserved
Channel_7B: DC.W %XGATE_16(ErrorHandler),               %XGATE_16(123)          ; Reserved
Channel_7C: DC.W %XGATE_16(ErrorHandler),               %XGATE_16(124)          ; Reserved
Channel_7D: DC.W %XGATE_16(ErrorHandler),               %XGATE_16(125)          ; Reserved
Channel_7E: DC.W %XGATE_16(ErrorHandler),               %XGATE_16(126)          ; Reserved
Channel_7F: DC.W %XGATE_16(ErrorHandler),               %XGATE_16(127)          ; Reserved 


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