in the MC9S12DP512,How to understand the INITRM register.

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in the MC9S12DP512,How to understand the INITRM register.

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yongpanan
Contributor II

The RAM is 0x0800-0x3FFF, By using the INITRM, How to change the range about RAM.

Did it means that by using the INITRM, I can take the RAM into the place anywhere with 0x0000-0xffff.

I have a memory map about the MC9S12DP512, But I can not understood the memory map.

By the way, How to use the keyword "RELOCATE_TO"?

Yongpan An

Thanks

I'm sorry for my poor English.

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lama
NXP TechSupport
NXP TechSupport

Hi,

 

Internal memory space is split into (device guide page 26; also good to read S12MMCV4.pdf regarding RAMHAL bit):

- 1k of registers mappable to any 2kB boundary within first 32 kB.

- 4k of EEPROM mappable to any 4kB boundary

- 14k of RAM mappable to any 16kB boundary

- Address space 4000~7FFF internal non-paged FLASH

- Address space 8000~BFFF memory window for access to the paged memory space

- Address space C000~FFFF internal non-paged FLASH

 

 

Note: Content of the register INITRM, INITRG and INITEE just selects boundary of given size and if alignment bit is not available then memory is aligned to bottom:

 

- Regs can be mapped to : 0000~03FF; 0800~0BFF; 1000~13FF; 1800~1BFF …. 7800~7BFF

 

- 14kRAM can be mapped to 16k blocks:

  0000~3FFF; 4000~7FFF; 8000~BFFF, C000~FFFF

  (if RAM is smaller than given boundary (block) then RAMHAL bit decides whether RAM is aligned to top or bottom
   of the boundary)

  So, RAM can be mapped:

  0000~37FF if    INITRM = 0x00;

  0800~3FFF if    INITRM = 0x01;  // RAMHAL sets alignment.

 

  4000~77FF if    INITRM = 0x40;

  4800~7FFF if    INITRM = 0x41;

 

  8000~B7FF if    INITRM = 0x80;

  8800~BFFF if    INITRM = 0x81;

  

  C000~F7FF if    INITRM = 0xC0;

  C800~FFFF if    INITRM = 0xC1;

 

BTW, any address from the block selects the RAM into the block. So, reset value is 0x09 which means:

“Place RAM into block containing address 0800 and align it up within the block.” => RAM at addresses 0800~3FFF.

 

 

- 4 kB EEPROM can be mapped to one of the 4k Blocks: 0000~0FFF; 1000~1FFF; 2000~2FFF, ….

 

Reset status of:

- INITRG is 0x00 – memory space 0000~03FF :

- INITRM is 0x09 - memory space 0800~3FFF :

- INITEE is 0x01 - memory space 0000~0FFF :

 

As you can see memory spaces overlaps considering priority:

BDM-> Registers->RAM->EEPROM->On-chip flash->remaining external space.

 

So,

- Registers are visible inside the memory space 0000~03FF :

- RAM is visible inside the memory space 0800~3FFF :

- EEPROM is not visible in full range because part 0000~03FF is overlapped by Registers and from 0x0800 it is overlapped by RAM.

 

 

If you want to have entire EEPROM it is good to remap the MCU. (For example, I steal 4k part from unpaged plash 4000~7FFF for EEPROM):

Regs:         0000~03FF

RAM :        0800~3FFF

EEPROM : 4000~4FFF

 

- INITRG is 0x00 – memory space 0000~03FF

- INITRM is 0x01 - memory space 0800~3FFF

- INITEE is 0x41 - memory space 0000~0FFF

 

In this configuration you can use entire RAM and EEPROM because spaces are not overlapped. The unpaged flash space 4000~4FFF is, however, still visible and accessible within the page 3E at addresses 3E8000~3E8FFF.

 

The reconfiguration must be done also in the CodeWarrior prm and Start 12.c file.

I have attached an examples which can explain you something more.

I have not checked them because they were created in 2007 and I believe they are OK. Entire description is always in the main.c file in the top.

If this does not answer your question(s), or I have forgotten something, or if you need more assistance, please contact me again.

 

Best Regards, Ladislav

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yongpanan
Contributor II

Ladislav

Thanks,

did it means that thflash 、ram and rom is physically the same architecture

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